[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 06/15] piix4: add Reset Control Register
From: |
Hervé Poussineau |
Subject: |
[Qemu-devel] [PATCH 06/15] piix4: add Reset Control Register |
Date: |
Sat, 16 Dec 2017 10:02:19 +0100 |
The RCR I/O port (0xcf9) is used to generate a hard reset or a soft reset.
Signed-off-by: Hervé Poussineau <address@hidden>
---
hw/isa/piix4.c | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 4f476dc7e6..7c83e7c23d 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -2,6 +2,7 @@
* QEMU PIIX4 PCI Bridge Emulation
*
* Copyright (c) 2006 Fabrice Bellard
+ * Copyright (c) 2016 Hervé Poussineau
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
deal
@@ -33,6 +34,10 @@ PCIDevice *piix4_dev;
typedef struct PIIX4State {
PCIDevice dev;
+
+ /* Reset Control Register */
+ MemoryRegion rcr_mem;
+ uint8_t rcr;
} PIIX4State;
#define TYPE_PIIX4_PCI_DEVICE "PIIX4"
@@ -87,6 +92,30 @@ static const VMStateDescription vmstate_piix4 = {
}
};
+static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned int len)
+{
+ PIIX4State *s = opaque;
+
+ if (val & 4) {
+ qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
+ return;
+ }
+ s->rcr = val & 2; /* keep System Reset type only */
+}
+
+static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int len)
+{
+ PIIX4State *s = opaque;
+ return s->rcr;
+}
+
+static const MemoryRegionOps piix4_rcr_ops = {
+ .read = piix4_rcr_read,
+ .write = piix4_rcr_write,
+ .endianness = DEVICE_LITTLE_ENDIAN
+};
+
static void piix4_realize(PCIDevice *pci, Error **errp)
{
DeviceState *dev = DEVICE(pci);
@@ -96,6 +125,12 @@ static void piix4_realize(PCIDevice *pci, Error **errp)
pci_address_space_io(pci), errp)) {
return;
}
+
+ memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s,
+ "reset-control", 1);
+ memory_region_add_subregion_overlap(pci_address_space_io(pci), 0xcf9,
+ &s->rcr_mem, 1);
+
piix4_dev = pci;
qemu_register_reset(piix4_reset, s);
}
--
2.11.0
- [Qemu-devel] [PATCH 00/15] piix4: cleanup and improvements, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 10/15] piix4: add a i8042 keyboard/mouse controller as specified in datasheet, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 02/15] serial/parallel: move object structures to header file, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 08/15] piix4: add a i8257 dma controller as specified in datasheet, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 03/15] mc146818rtc: move structure to header file, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 01/15] fdc: move object structures to header file, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 13/15] piix4: add a speaker as specified in datasheet, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 11/15] piix4: add a floppy controller, 1 parallel port and 2 serial ports, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 07/15] piix4: add a i8259 interrupt controller as specified in datasheet, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 06/15] piix4: add Reset Control Register,
Hervé Poussineau <=
- [Qemu-devel] [PATCH 15/15] piix4: we can now instanciate a PIIX4 with -device, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 12/15] piix4: add a mc146818rtc controller as specified in datasheet, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 09/15] piix4: add a i8254 pit controller as specified in datasheet, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 14/15] piix4: rename PIIX4 object to piix4-isa, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 04/15] mc146818rtc: always register rtc to rtc list, Hervé Poussineau, 2017/12/16
- [Qemu-devel] [PATCH 05/15] piix4: rename some variables in realize function, Hervé Poussineau, 2017/12/16
- Re: [Qemu-devel] [PATCH 00/15] piix4: cleanup and improvements, no-reply, 2017/12/17