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[Qemu-devel] [PATCH v3 16/42] sdhci: use deposit64() on admasysaddr
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-devel] [PATCH v3 16/42] sdhci: use deposit64() on admasysaddr |
Date: |
Fri, 29 Dec 2017 14:49:07 -0300 |
This makes the code slightly safer, and easier to review.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
---
hw/sd/sdhci.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index a47ed61248..7f2c3dc9d5 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1117,12 +1117,10 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val,
unsigned size)
MASKED_WRITE(s->admaerr, mask, value);
break;
case SDHC_ADMASYSADDR:
- s->admasysaddr = (s->admasysaddr & (0xFFFFFFFF00000000ULL |
- (uint64_t)mask)) | (uint64_t)value;
+ s->admasysaddr = deposit64(s->admasysaddr, 0, 32, value);
break;
case SDHC_ADMASYSADDR + 4:
- s->admasysaddr = (s->admasysaddr & (0x00000000FFFFFFFFULL |
- ((uint64_t)mask << 32))) | ((uint64_t)value << 32);
+ s->admasysaddr = deposit64(s->admasysaddr, 32, 32, value);
break;
case SDHC_FEAER:
s->acmd12errsts |= value;
--
2.15.1
- [Qemu-devel] [PATCH v3 06/42] sdhci: refactor common sysbus/pci realize() into sdhci_realizefn(), (continued)
- [Qemu-devel] [PATCH v3 06/42] sdhci: refactor common sysbus/pci realize() into sdhci_realizefn(), Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 07/42] sdhci: refactor common sysbus/pci unrealize() into sdhci_unrealizefn(), Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 08/42] sdhci: use qemu_log_mask(UNIMP) instead of fprintf(), Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 09/42] sdhci: convert the DPRINT() calls into trace events, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 10/42] sdhci: add a GPIO for the 'access control' LED, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 11/42] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h", Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 12/42] sdhci: use FIELD_DP32() macro for the WRITE_PROTECT flag, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 13/42] sdhci: rename the SDHC_CAPAB register, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 14/42] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 15/42] sdhci: Implement write method of ACMD12ERRSTS register, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 16/42] sdhci: use deposit64() on admasysaddr,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCH v3 17/42] sdhci: add a "dma-memory" property, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 18/42] sdhci: add a spec_version property, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 19/42] sdhci: add basic Spec v1 capabilities, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 20/42] sdhci: add max-block-length capability (Spec v1), Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 22/42] sdhci: add DMA and 64-bit capabilities (Spec v2), Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 23/42] sdhci: default to Spec v2, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 24/42] sdhci: add a 'dma' shortcut property, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 26/42] sdhci: Fix 64-bit ADMA2, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 27/42] hw/arm/exynos4210: implement SDHCI Spec v2, Philippe Mathieu-Daudé, 2017/12/29
- [Qemu-devel] [PATCH v3 28/42] hw/arm/xilinx_zynq: implement SDHCI Spec v2, Philippe Mathieu-Daudé, 2017/12/29