Re: [Qemu-devel] [PATCH v3 06/21] RISC-V FPU Support

[Michael Clark]

On Fri, Jan 12, 2018 at 4:31 AM, Richard Henderson <
address@hidden> wrote:

> On 01/10/2018 06:21 PM, Michael Clark wrote:
> > Helper routines for FPU instructions and NaN definitions.
> >
> > Signed-off-by: Michael Clark <address@hidden>
> > ---
> >  fpu/softfloat-specialize.h |   7 +-
> >  target/riscv/fpu_helper.c  | 591 ++++++++++++++++++++++++++++++
> +++++++++++++++
> >  2 files changed, 595 insertions(+), 3 deletions(-)
> >  create mode 100644 target/riscv/fpu_helper.c
>
> It doesn't look like you have addressed any of my comments against v1 here.


No I haven't sorry. I'll go back through your feedback.

I'm going to have to defer looking at this until the weekend as i've used
all of my QEMU "background time" this week.

I don't know if tininess is one of the comments. i.e. setting underflow
before of after rounding. RISC-V sets underflow after rounding and we need
to figure out how to do that.

The RISC-V QEMU port is presently quite usable, and we have fedora and
debian folk both working on packacking for RISC-V. The general sentiment is
does our port need to be perfect to be accepted in-tree? or can we work on
clean-ups and bug fixes in tree? We're pretty committed to transforming it
into a high quality port and we will have plently of time going forward to
address any issues. We have to balance cleanups and bug fixes for corner
cases with adding and improve device emulation support. So far all of the
recent effort has gone into the former, i.e. clean-ups and bug fixes, so
you can be sure we will attend to any remaining issues in the comitted
blocks of time we have available to work on the port.