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From: | Palmer Dabbelt |
Subject: | Re: [Qemu-devel] [PATCH v2 00/21] RISC-V QEMU Port Submission v2 |
Date: | Thu, 11 Jan 2018 11:16:56 -0800 (PST) |
On Wed, 10 Jan 2018 23:58:12 PST (-0800), address@hidden wrote:
On Wed, Jan 10, 2018 at 03:46:19PM -0800, Michael Clark wrote:- RISC-V Instruction Set Manual Volume I: User-Level ISA Version 2.2 - RISC-V Instruction Set Manual Volume II: Privileged ISA Version 1.9.1 - RISC-V Instruction Set Manual Volume II: Privileged ISA Version 1.10Same question as for V2: Why do you want to add code for an obsolete version of the privileged ISA spec? (which as far as I can tell can't even be found online).
We have a 1.9.1 chip, and that currently constitutes the vast majority of the RISC-V silicon in the wild. The (somewhat lofty) goal is to eventually be able to emulate every RISC-V system in the world.
The spec is still available online https://github.com/riscv/riscv-isa-manual/blob/master/release/riscv-privileged-v1.9.1.pdf
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