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[Qemu-devel] [PATCH v7 03/14] sdhci: refactor same sysbus/pci properties
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-devel] [PATCH v7 03/14] sdhci: refactor same sysbus/pci properties into a common one |
Date: |
Sat, 13 Jan 2018 02:07:06 -0300 |
Add common/sysbus/pci/sdbus comments to have clearer code blocks separation.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
include/hw/sd/sdhci.h | 4 +++-
hw/sd/sdhci.c | 46 ++++++++++++++++++++++++++++------------------
2 files changed, 31 insertions(+), 19 deletions(-)
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index dacd726537..8041c9629e 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -79,13 +79,15 @@ typedef struct SDHCIState {
uint32_t buf_maxsz;
uint16_t data_count; /* current element in FIFO buffer */
uint8_t stopped_state;/* Current SDHC state */
- bool pending_insert_quirk;/* Quirk for Raspberry Pi card insert int */
bool pending_insert_state;
/* Buffer Data Port Register - virtual access point to R and W buffers */
/* Software Reset Register - always reads as 0 */
/* Force Event Auto CMD12 Error Interrupt Reg - write only */
/* Force Event Error Interrupt Register- write only */
/* RO Host Controller Version Register always reads as 0x2401 */
+
+ /* Configurable properties */
+ bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */
} SDHCIState;
#define TYPE_PCI_SDHCI "sdhci-pci"
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 365bc80009..6c3389cfdc 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qapi/error.h"
#include "hw/hw.h"
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
@@ -1185,8 +1186,23 @@ static inline unsigned int sdhci_get_fifolen(SDHCIState
*s)
}
}
+/* --- qdev common --- */
+
+/* Capabilities registers provide information on supported features of this
+ * specific host controller implementation */
+static Property sdhci_capareg_property =
+ DEFINE_PROP_UINT32("capareg", SDHCIState, capareg, SDHC_CAPAB_REG_DEFAULT);
+
+static Property sdhci_maxcurr_property =
+ DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0);
+
static void sdhci_initfn(SDHCIState *s)
{
+ DeviceState *dev = DEVICE(s);
+
+ qdev_property_add_static(dev, &sdhci_capareg_property, &error_abort);
+ qdev_property_add_static(dev, &sdhci_maxcurr_property, &error_abort);
+
qbus_create_inplace(&s->sdbus, sizeof(s->sdbus),
TYPE_SDHCI_BUS, DEVICE(s), "sd-bus");
@@ -1264,14 +1280,7 @@ const VMStateDescription sdhci_vmstate = {
},
};
-/* Capabilities registers provide information on supported features of this
- * specific host controller implementation */
-static Property sdhci_pci_properties[] = {
- DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
- SDHC_CAPAB_REG_DEFAULT),
- DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
- DEFINE_PROP_END_OF_LIST(),
-};
+/* --- qdev PCI --- */
static void sdhci_pci_realize(PCIDevice *dev, Error **errp)
{
@@ -1305,7 +1314,6 @@ static void sdhci_pci_class_init(ObjectClass *klass, void
*data)
k->class_id = PCI_CLASS_SYSTEM_SDHCI;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->vmsd = &sdhci_vmstate;
- dc->props = sdhci_pci_properties;
dc->reset = sdhci_poweron_reset;
}
@@ -1320,20 +1328,21 @@ static const TypeInfo sdhci_pci_info = {
},
};
-static Property sdhci_sysbus_properties[] = {
- DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
- SDHC_CAPAB_REG_DEFAULT),
- DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
- DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_quirk,
- false),
- DEFINE_PROP_END_OF_LIST(),
-};
+/* --- qdev SysBus --- */
+
+static Property sdhci_sysbus_pending_insert_quirk_property =
+ DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState,
+ pending_insert_quirk, false);
static void sdhci_sysbus_init(Object *obj)
{
SDHCIState *s = SYSBUS_SDHCI(obj);
sdhci_initfn(s);
+
+ qdev_property_add_static(DEVICE(obj),
+ &sdhci_sysbus_pending_insert_quirk_property,
+ &error_abort);
}
static void sdhci_sysbus_finalize(Object *obj)
@@ -1360,7 +1369,6 @@ static void sdhci_sysbus_class_init(ObjectClass *klass,
void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &sdhci_vmstate;
- dc->props = sdhci_sysbus_properties;
dc->realize = sdhci_sysbus_realize;
dc->reset = sdhci_poweron_reset;
}
@@ -1374,6 +1382,8 @@ static const TypeInfo sdhci_sysbus_info = {
.class_init = sdhci_sysbus_class_init,
};
+/* --- qdev bus master --- */
+
static void sdhci_bus_class_init(ObjectClass *klass, void *data)
{
SDBusClass *sbc = SD_BUS_CLASS(klass);
--
2.15.1
- [Qemu-devel] [PATCH v7 00/14] SDHCI: housekeeping (part 1), Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 01/14] sdhci: clean up includes, Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 02/14] sdhci: remove dead code, Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 04/14] sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init(), Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 03/14] sdhci: refactor same sysbus/pci properties into a common one,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCH v7 05/14] sdhci: refactor common sysbus/pci realize() into sdhci_common_realize(), Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 07/14] sdhci: use qemu_log_mask(UNIMP) instead of fprintf(), Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 06/14] sdhci: refactor common sysbus/pci unrealize() into sdhci_common_unrealize(), Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 08/14] sdhci: convert the DPRINT() calls into trace events, Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 09/14] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h", Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 10/14] sdhci: rename the SDHC_CAPAB register, Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 11/14] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only, Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 12/14] sdhci: Implement write method of ACMD12ERRSTS register, Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 14/14] sdhci: add a 'dma' property to the sysbus devices, Philippe Mathieu-Daudé, 2018/01/13
- [Qemu-devel] [PATCH v7 13/14] sdhci: fix the PCI device, using the PCI address space for DMA, Philippe Mathieu-Daudé, 2018/01/13