[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v4 3/4] target/arm: implement SM3 instructions
From: |
Ard Biesheuvel |
Subject: |
Re: [Qemu-devel] [PATCH v4 3/4] target/arm: implement SM3 instructions |
Date: |
Mon, 22 Jan 2018 16:58:48 +0000 |
On 22 January 2018 at 16:56, Peter Maydell <address@hidden> wrote:
> On 22 January 2018 at 16:52, Ard Biesheuvel <address@hidden> wrote:
>> On 22 January 2018 at 16:39, Peter Maydell <address@hidden> wrote:
>>> This seems to be missing support for SM4EKEY (which is O==1
>>> opcode == 0b10 and also part of the v8.2 SM feature) ?
>
>> It is part of the v8.2 SM extension, which consists of SM3 secure hash
>> and SM4 encryption, which are two different things (and AA64ISAR0 has
>> separate feature bits for each). The ARM ARM does stipulate that both
>> should be set if either one is set, but still provides two separate
>> bits, and so one can be enabled without the other.
>
> Yes, I just discovered that I'd got confused by the ID registers
> providing more granular settings than the various specified
> extension combinations do.
>
> It would be nice to also have SM4 so we can say we have got all
> of the v8.2 crypto extensions, but we can do that as a separate patch.
>
I intend to look at SM4 as well, but not sure when exactly.
- [Qemu-devel] [PATCH v4 1/4] target/arm: implement SHA-512 instructions, (continued)
Re: [Qemu-devel] [PATCH v4 0/4] target-arm: add SHA-3, SM3 and SHA512 instruction support, Peter Maydell, 2018/01/22