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Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support |
Date: |
Wed, 24 Jan 2018 15:47:39 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 |
On 01/24/2018 10:58 AM, Jim Wilson wrote:
> I think that qemu is correct here, and that you want to use float32_chs.
Ok.
> Although, looking at this again, I see another statement in a
> different place that says:
>
> Except when otherwise stated, if the result of a floating-point operation is
> NaN, it is the canonical NaN. The canonical NaN has a positive sign and all
> significand bits clear except the MSB, a.k.a. the quiet bit. For
> single-precision floating-point, this corresponds to the pattern
> 0x7fc00000.
Yes, I had read this before as well. I had assumed that your patch constituted
an intended change to this text.
> This could take a little time to sort out.
Ok. I don't see this as a blocking issue for merging.
r~
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, (continued)
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Michael Clark, 2018/01/23
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Richard Henderson, 2018/01/23
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Michael Clark, 2018/01/23
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Richard Henderson, 2018/01/24
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Michael Clark, 2018/01/24
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Michael Clark, 2018/01/23
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Michael Clark, 2018/01/23
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Jim Wilson, 2018/01/23
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Richard Henderson, 2018/01/23
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Jim Wilson, 2018/01/24
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support,
Richard Henderson <=
- Re: [Qemu-devel] [PATCH v1 06/21] RISC-V FPU Support, Jim Wilson, 2018/01/29
[Qemu-devel] [PATCH v1 04/21] RISC-V Disassembler, Michael Clark, 2018/01/02
[Qemu-devel] [PATCH v1 09/21] RISC-V Physical Memory Protection, Michael Clark, 2018/01/02
[Qemu-devel] [PATCH v1 12/21] RISC-V HART Array, Michael Clark, 2018/01/02