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Re: [Qemu-devel] [PATCH v5 2/4] target/arm: implement SHA-3 instructions

From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH v5 2/4] target/arm: implement SHA-3 instructions
Date: Tue, 6 Feb 2018 13:16:42 +0000

On 23 January 2018 at 20:09, Ard Biesheuvel <address@hidden> wrote:
> On 22 January 2018 at 17:26, Ard Biesheuvel <address@hidden> wrote:
>> This implements emulation of the new SHA-3 instructions that have
>> been added as an optional extensions to the ARMv8 Crypto Extensions
>> in ARM v8.2.

>> +    if (op0 < 2) {
>> +        TCG_i64 tcg_op1, tcg_op2, tcg_op3, tcg_res[2];
> Apologies, there's a typo here: TCGv_i64 not TCG_i64
> Let me know if I need to resend.

No, if that's the only issue I'll just fix it up locally.

>> +        tcg_temp_free(tcg_op1);
>> +        tcg_temp_free(tcg_op2);
>> +        tcg_temp_free(tcg_op3);
>> +        tcg_temp_free(tcg_res[0]);
>> +        tcg_temp_free(tcg_res[1]);

These I think should all be tcg_temp_free_i64(). The unsuffixed
version is for "TCGv", which is a value of size target_ulong.
As it happens that's always i64 for code in translate-a64.c,
so it's only a stylistic difference, but the rest of the code
explicitly uses i64. I'll fix this locally too.

-- PMM

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