[Qemu-devel] [PULL 00/20] tcg: generic vector operaions

[Richard Henderson]

Aside from r-b markers, there is only one minor change from v11.

The check_operand_size assert loosened to allow 8-byte operation
with a large (in this case 32-byte) clear.  Previously we'd test
the clear size and require the operation be a multiple of 16.
This showed up during an AdvSIMD insn with SVE enabled.


r~


The following changes since commit 17a5bbb44df9a4a79166332bc26e2d8ca6bd8fa8:

  Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-02-06' into 
staging (2018-02-07 16:26:01 +0000)

are available in the Git repository at:

  git://github.com/rth7680/qemu.git tags/pull-tcg-20180207

for you to fetch changes up to b63799b11c17e8f1068dbd05c18cbb9c9aa69c56:

  tcg/aarch64: Add vector operations (2018-02-07 14:47:50 -0800)

----------------------------------------------------------------
tcg generic vectors

----------------------------------------------------------------
Richard Henderson (20):
      tcg: Allow multiple word entries into the constant pool
      tcg: Add types and basic operations for host vectors
      tcg: Standardize integral arguments to expanders
      tcg: Add generic vector expanders
      tcg: Add generic vector ops for constant shifts
      tcg: Add generic vector ops for comparisons
      tcg: Add generic vector ops for multiplication
      tcg: Add generic helpers for saturating arithmetic
      tcg: Add generic vector helpers with a scalar operand
      tcg/optimize: Handle vector opcodes during optimize
      target/arm: Align vector registers
      target/arm: Use vector infrastructure for aa64 add/sub/logic
      target/arm: Use vector infrastructure for aa64 mov/not/neg
      target/arm: Use vector infrastructure for aa64 dup/movi
      target/arm: Use vector infrastructure for aa64 constant shifts
      target/arm: Use vector infrastructure for aa64 compares
      target/arm: Use vector infrastructure for aa64 multiplies
      target/arm: Use vector infrastructure for aa64 orr/bic immediate
      tcg/i386: Add vector operations
      tcg/aarch64: Add vector operations

 Makefile.target              |    4 +-
 accel/tcg/tcg-runtime.h      |  118 +++
 target/arm/cpu.h             |    2 +-
 tcg/aarch64/tcg-target.h     |   25 +-
 tcg/aarch64/tcg-target.opc.h |    3 +
 tcg/i386/tcg-target.h        |   41 +-
 tcg/i386/tcg-target.opc.h    |   13 +
 tcg/tcg-gvec-desc.h          |   49 +
 tcg/tcg-op-gvec.h            |  306 ++++++
 tcg/tcg-op.h                 |   52 +-
 tcg/tcg-opc.h                |   46 +
 tcg/tcg.h                    |   87 ++
 accel/tcg/tcg-runtime-gvec.c |  997 +++++++++++++++++++
 target/arm/translate-a64.c   |  975 ++++++++++++++-----
 tcg/aarch64/tcg-target.inc.c |  588 ++++++++++-
 tcg/i386/tcg-target.inc.c    |  987 ++++++++++++++++++-
 tcg/optimize.c               |  150 +--
 tcg/tcg-op-gvec.c            | 2216 ++++++++++++++++++++++++++++++++++++++++++
 tcg/tcg-op-vec.c             |  389 ++++++++
 tcg/tcg-op.c                 |   42 +-
 tcg/tcg-pool.inc.c           |  115 ++-
 tcg/tcg.c                    |  125 ++-
 accel/tcg/Makefile.objs      |    2 +-
 configure                    |   48 +
 tcg/README                   |   86 ++
 25 files changed, 6970 insertions(+), 496 deletions(-)
 create mode 100644 tcg/aarch64/tcg-target.opc.h
 create mode 100644 tcg/i386/tcg-target.opc.h
 create mode 100644 tcg/tcg-gvec-desc.h
 create mode 100644 tcg/tcg-op-gvec.h
 create mode 100644 accel/tcg/tcg-runtime-gvec.c
 create mode 100644 tcg/tcg-op-gvec.c
 create mode 100644 tcg/tcg-op-vec.c