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Re: [Qemu-devel] [PATCH v2 03/11] hw/intc/armv7m_nvic: Implement M profi

From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH v2 03/11] hw/intc/armv7m_nvic: Implement M profile cache maintenance ops
Date: Fri, 9 Feb 2018 12:34:02 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0

On 02/09/2018 08:58 AM, Peter Maydell wrote:
> For M profile cores, cache maintenance operations are done by
> writing to special registers in the system register space.
> For QEMU, cache operations are always NOPs, since we don't
> implement the cache. Implementing these explicitly avoids
> a spurious LOG_GUEST_ERROR when the guest uses them.
> Signed-off-by: Peter Maydell <address@hidden>
> ---
>  hw/intc/armv7m_nvic.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)

Reviewed-by: Richard Henderson <address@hidden>


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