[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PULL 00/20] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL 00/20] target-arm queue |
Date: |
Thu, 15 Feb 2018 19:41:10 +0000 |
On 15 February 2018 at 18:36, Peter Maydell <address@hidden> wrote:
> Changes v1->v2: it turns out that the raspi3 support exposes a
> preexisting bug in our register definitions for VMPIDR/VMIDR:
> https://lists.gnu.org/archive/html/qemu-devel/2018-02/msg04181.html
>
> So I've dropped the final "enable raspi3 board" patch for the
> moment. When that VMIDR/VMPIDR patch gets reviewed we can
> put the raspi3 patch in with it.
>
>
> thanks
> -- PMM
>
> The following changes since commit f003d07337a6d4d02c43429b26a4270459afb51a:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
> into staging (2018-02-15 15:45:33 +0000)
>
> are available in the Git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20180215-1
>
> for you to fetch changes up to bade58166f4466546600d824a2695a00269d10eb:
>
> raspi: Raspberry Pi 3 support (2018-02-15 18:33:46 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * aspeed: code cleanup to use unimplemented_device
> * preparatory work for 'raspi3' RaspberryPi 3 machine model
> * more SVE prep work
> * v8M: add minor missing registers
> * v7M: fix bug where we weren't migrating v7m.other_sp
> * v7M: fix bugs in handling of interrupt registers for
> external interrupts beyond 32
>
Applied this version, thanks.
-- PMM
- [Qemu-devel] [PULL 15/20] hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions, (continued)
- [Qemu-devel] [PULL 15/20] hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions, Peter Maydell, 2018/02/15
- [Qemu-devel] [PULL 09/20] hw/intc/armv7m_nvic: Fix ICSR PENDNMISET/CLR handling, Peter Maydell, 2018/02/15
- [Qemu-devel] [PULL 07/20] target/arm: Handle SVE registers when using clear_vec_high, Peter Maydell, 2018/02/15
- [Qemu-devel] [PULL 12/20] hw/intc/armv7m_nvic: Implement cache ID registers, Peter Maydell, 2018/02/15
- [Qemu-devel] [PULL 14/20] target/arm: Implement writing to CONTROL_NS for v8M, Peter Maydell, 2018/02/15
- [Qemu-devel] [PULL 16/20] target/arm: Add AIRCR to vmstate struct, Peter Maydell, 2018/02/15
- [Qemu-devel] [PULL 19/20] bcm2836: Make CPU type configurable, Peter Maydell, 2018/02/15
- [Qemu-devel] [PULL 20/20] raspi: Raspberry Pi 3 support, Peter Maydell, 2018/02/15
- [Qemu-devel] [PULL 17/20] target/arm: Migrate v7m.other_sp, Peter Maydell, 2018/02/15
- [Qemu-devel] [PULL 18/20] target/arm: Implement v8M MSPLIM and PSPLIM registers, Peter Maydell, 2018/02/15
- Re: [Qemu-devel] [PULL 00/20] target-arm queue,
Peter Maydell <=