[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v2] intel-iommu: Accept 64-bit writes to FEADDR
From: |
Peter Xu |
Subject: |
Re: [Qemu-devel] [PATCH v2] intel-iommu: Accept 64-bit writes to FEADDR |
Date: |
Mon, 26 Feb 2018 10:54:18 +0800 |
User-agent: |
Mutt/1.9.1 (2017-09-22) |
On Sat, Feb 24, 2018 at 09:30:12AM +0100, Jan Kiszka wrote:
> From: Jan Kiszka <address@hidden>
>
> Xen is doing this [1] and currently triggers an abort.
>
> [1]
> http://xenbits.xenproject.org/gitweb/?p=xen.git;a=blob;f=xen/drivers/passthrough/vtd/iommu.c;h=daaed0abbdd06b6ba3d948ea103aadf02651e83c;hb=refs/heads/master#l1108
>
> Reported-by: Luis Lloret <address@hidden>
> Signed-off-by: Jan Kiszka <address@hidden>
Thanks, Jan.
Reviewed-by: Peter Xu <address@hidden>
> ---
> hw/i386/intel_iommu.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 2e841cde27..fb31de9416 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -2129,8 +2129,15 @@ static void vtd_mem_write(void *opaque, hwaddr addr,
>
> /* Fault Event Address Register, 32-bit */
> case DMAR_FEADDR_REG:
> - assert(size == 4);
> - vtd_set_long(s, addr, val);
> + if (size == 4) {
> + vtd_set_long(s, addr, val);
> + } else {
> + /*
> + * While the register is 32-bit only, some guests (Xen...) write
> to
> + * it with 64-bit.
> + */
> + vtd_set_quad(s, addr, val);
> + }
> break;
>
> /* Fault Event Upper Address Register, 32-bit */
--
Peter Xu