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[Qemu-devel] [PATCH v1 1/1] target/arm: Fix the A53 L2CTLR typo


From: Alistair Francis
Subject: [Qemu-devel] [PATCH v1 1/1] target/arm: Fix the A53 L2CTLR typo
Date: Thu, 1 Mar 2018 16:20:57 -0800

The cortex A53 TRM specifices that bits 24 and 25 of the L2CTLR register
specify the number of cores present and not the number of processors. We
have correctly been reporting the number of cores, so just fix the
comment to match the TRM.

Signed-off-by: Alistair Francis <address@hidden>
---

 target/arm/cpu64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 9743bdc8c3..aac1746efe 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -42,7 +42,7 @@ static inline void unset_feature(CPUARMState *env, int 
feature)
 #ifndef CONFIG_USER_ONLY
 static uint64_t a57_a53_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri)
 {
-    /* Number of processors is in [25:24]; otherwise we RAZ */
+    /* Number of cores is in [25:24]; otherwise we RAZ */
     return (smp_cpus - 1) << 24;
 }
 #endif
-- 
2.14.1




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