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Re: [Qemu-devel] [PULL 00/39] target-arm queue


From: no-reply
Subject: Re: [Qemu-devel] [PULL 00/39] target-arm queue
Date: Fri, 2 Mar 2018 03:42:24 -0800 (PST)

Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PULL 00/39] target-arm queue

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
07592e905f target/arm: Enable ARM_FEATURE_V8_FCMA
6c8222b6c6 target/arm: Decode t32 simd 3reg and 2reg_scalar extension
b73d4cc54e target/arm: Decode aa32 armv8.3 2-reg-index
66ab51b23c target/arm: Decode aa32 armv8.3 3-same
cc78d52b8d target/arm: Decode aa64 armv8.3 fcmla
9728d0f9a0 target/arm: Decode aa64 armv8.3 fcadd
9140095bd2 target/arm: Add ARM_FEATURE_V8_FCMA
2cef06e168 target/arm: Enable ARM_FEATURE_V8_RDM
c3187bd2d1 target/arm: Decode aa32 armv8.1 two reg and a scalar
20a10927a9 target/arm: Decode aa32 armv8.1 three same
d1bc4002b5 target/arm: Decode aa64 armv8.1 scalar/vector x indexed element
4949713da7 target/arm: Decode aa64 armv8.1 three same extra
7fe94bb4e9 target/arm: Decode aa64 armv8.1 scalar three same extra
fe73727275 target/arm: Refactor disas_simd_indexed size checks
bae6b03cb4 target/arm: Refactor disas_simd_indexed decode
cdc5cc0120 target/arm: Add ARM_FEATURE_V8_RDM
5f832f82b5 mps2-an505: New board model: MPS2 with AN505 Cortex-M33 FPGA image
c443d32f56 hw/arm/iotkit: Model Arm IOT Kit
1e384c06de hw/misc/iotkit-secctl: Add remaining simple registers
ac055245e3 hw/misc/iotkit-secctl: Add handling for PPCs
e140d2f3d3 hw/misc/iotkit-secctl: Arm IoT Kit security controller initial 
skeleton
53038cfda1 hw/misc/tz-ppc: Model TrustZone peripheral protection controller
378d21b0a8 hw/misc/mps2-fpgaio: FPGA control block for MPS2 AN505
8d41ee5fe4 hw/core/split-irq: Device that splits IRQ lines
ebc426692e qdev: Add new qdev_init_gpio_in_named_with_opaque()
2c788c50e4 include/hw/or-irq.h: Add missing include guard
123b550f83 hw/misc/unimp: Move struct to header file
8ce08509c9 target/arm: Add Cortex-M33
139ffee44a armv7m: Forward init-svtor property to CPU object
f6e3b383e0 target/arm: Define init-svtor property for the reset secure VTOR 
value
6ca9513a50 armv7m: Forward idau property to CPU object
ae1c0cc39b target/arm: Define an IDAU interface
0f754d3fa3 hw/arm/armv7m: Honour CPU's address space for image loads
a867223e66 hw/arm/boot: Honour CPU's address space for image loads
c9b9690321 loader: Add new load_ramdisk_as()
ac62090e7a decodetree: Propagate return value from translate subroutines
821be1e774 xlnx-zynqmp: Connect the RTC device
7d096dbc74 xlnx-zynqmp-rtc: Add basic time support
bdc7542c00 xlnx-zynqmp-rtc: Initial commit

=== OUTPUT BEGIN ===
Checking PATCH 1/39: xlnx-zynqmp-rtc: Initial commit...
Checking PATCH 2/39: xlnx-zynqmp-rtc: Add basic time support...
Checking PATCH 3/39: xlnx-zynqmp: Connect the RTC device...
Checking PATCH 4/39: decodetree: Propagate return value from translate 
subroutines...
Checking PATCH 5/39: loader: Add new load_ramdisk_as()...
Checking PATCH 6/39: hw/arm/boot: Honour CPU's address space for image loads...
Checking PATCH 7/39: hw/arm/armv7m: Honour CPU's address space for image 
loads...
Checking PATCH 8/39: target/arm: Define an IDAU interface...
Checking PATCH 9/39: armv7m: Forward idau property to CPU object...
Checking PATCH 10/39: target/arm: Define init-svtor property for the reset 
secure VTOR value...
Checking PATCH 11/39: armv7m: Forward init-svtor property to CPU object...
Checking PATCH 12/39: target/arm: Add Cortex-M33...
Checking PATCH 13/39: hw/misc/unimp: Move struct to header file...
Checking PATCH 14/39: include/hw/or-irq.h: Add missing include guard...
Checking PATCH 15/39: qdev: Add new qdev_init_gpio_in_named_with_opaque()...
Checking PATCH 16/39: hw/core/split-irq: Device that splits IRQ lines...
Checking PATCH 17/39: hw/misc/mps2-fpgaio: FPGA control block for MPS2 AN505...
Checking PATCH 18/39: hw/misc/tz-ppc: Model TrustZone peripheral protection 
controller...
Checking PATCH 19/39: hw/misc/iotkit-secctl: Arm IoT Kit security controller 
initial skeleton...
WARNING: line over 80 characters
#530: FILE: include/hw/misc/iotkit-secctl.h:14:
+ * 
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ecm0601256/index.html

total: 0 errors, 1 warnings, 511 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 20/39: hw/misc/iotkit-secctl: Add handling for PPCs...
Checking PATCH 21/39: hw/misc/iotkit-secctl: Add remaining simple registers...
Checking PATCH 22/39: hw/arm/iotkit: Model Arm IOT Kit...
WARNING: line over 80 characters
#662: FILE: include/hw/arm/iotkit.h:13:
+ * 
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ecm0601256/index.html

total: 0 errors, 1 warnings, 718 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 23/39: mps2-an505: New board model: MPS2 with AN505 Cortex-M33 
FPGA image...
ERROR: line over 90 characters
#56: FILE: hw/arm/mps2-tz.c:21:
+ * 
https://developer.arm.com/products/system-design/development-boards/fpga-prototyping-boards/mps2

ERROR: line over 90 characters
#59: FILE: hw/arm/mps2-tz.c:24:
+ * 
http://infocenter.arm.com/help/topic/com.arm.doc.100112_0200_06_en/versatile_express_cortex_m_prototyping_systems_v2m_mps2_and_v2m_mps2plus_technical_reference_100112_0200_06_en.pdf

WARNING: line over 80 characters
#65: FILE: hw/arm/mps2-tz.c:30:
+ *   
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ecm0601256/index.html

total: 2 errors, 1 warnings, 509 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 24/39: target/arm: Add ARM_FEATURE_V8_RDM...
Checking PATCH 25/39: target/arm: Refactor disas_simd_indexed decode...
Checking PATCH 26/39: target/arm: Refactor disas_simd_indexed size checks...
Checking PATCH 27/39: target/arm: Decode aa64 armv8.1 scalar three same extra...
ERROR: Macros with complex values should be enclosed in parenthesis
#179: FILE: target/arm/vec_helper.c:27:
+#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] |= CPSR_Q

total: 1 errors, 0 warnings, 225 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 28/39: target/arm: Decode aa64 armv8.1 three same extra...
Checking PATCH 29/39: target/arm: Decode aa64 armv8.1 scalar/vector x indexed 
element...
Checking PATCH 30/39: target/arm: Decode aa32 armv8.1 three same...
Checking PATCH 31/39: target/arm: Decode aa32 armv8.1 two reg and a scalar...
Checking PATCH 32/39: target/arm: Enable ARM_FEATURE_V8_RDM...
Checking PATCH 33/39: target/arm: Add ARM_FEATURE_V8_FCMA...
Checking PATCH 34/39: target/arm: Decode aa64 armv8.3 fcadd...
Checking PATCH 35/39: target/arm: Decode aa64 armv8.3 fcmla...
Checking PATCH 36/39: target/arm: Decode aa32 armv8.3 3-same...
Checking PATCH 37/39: target/arm: Decode aa32 armv8.3 2-reg-index...
Checking PATCH 38/39: target/arm: Decode t32 simd 3reg and 2reg_scalar 
extension...
Checking PATCH 39/39: target/arm: Enable ARM_FEATURE_V8_FCMA...
=== OUTPUT END ===

Test command exited with code: 1


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