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Re: [Qemu-devel] [PATCH] trace: fix ARM TrustZone PPC hwaddr type


From: Philippe Mathieu-Daudé
Subject: Re: [Qemu-devel] [PATCH] trace: fix ARM TrustZone PPC hwaddr type
Date: Tue, 6 Mar 2018 15:40:23 -0300
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0

On 03/06/2018 02:22 PM, Stefan Hajnoczi wrote:
> Commit 9eb8040c2d2b ("hw/misc/tz-ppc: Model TrustZone peripheral
> protection controller") added trace events with hwaddr type arguments.
> 
> This is not allowed and leads to the following compiler errors when
> building with ./configure --enable-trace-backends=ust:
> 
>   trace-ust-all.h:11847:20: error: unknown type name ‘hwaddr’; did you mean 
> ‘h_addr’?
>     TP_ARGS(int, n, hwaddr, offset, bool, secure, bool, user),
> 
> Generated LTTng UST tracepoint definitions cannot include declarations
> for all QEMU types and therefore docs/devel/tracing.txt requires using
> only primitive or stdint.h types.

Maybe the trace generator script can check for legal/forbidden types?

> 
> Cc: Peter Maydell <address@hidden>
> Signed-off-by: Stefan Hajnoczi <address@hidden>

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>

> ---
>  hw/misc/trace-events | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/misc/trace-events b/hw/misc/trace-events
> index eb5ffcc0a8..562d9ed005 100644
> --- a/hw/misc/trace-events
> +++ b/hw/misc/trace-events
> @@ -92,8 +92,8 @@ tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
>  tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
>  tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
>  tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
> -tz_ppc_read_blocked(int n, hwaddr offset, bool secure, bool user) "TZ PPC: 
> port %d offset 0x%" HWADDR_PRIx " read (secure %d user %d) blocked"
> -tz_ppc_write_blocked(int n, hwaddr offset, bool secure, bool user) "TZ PPC: 
> port %d offset 0x%" HWADDR_PRIx " write (secure %d user %d) blocked"
> +tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: 
> port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked"
> +tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ 
> PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked"
>  
>  # hw/misc/iotkit-secctl.c
>  iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit 
> SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u"
> 



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