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[Qemu-devel] ARM64 Interrupt handling on QEMU


From: Brijen Raval
Subject: [Qemu-devel] ARM64 Interrupt handling on QEMU
Date: Thu, 15 Mar 2018 03:07:17 +0000

I am booting up a custom kernel on QEMU ARM64, upon completion of its
initial boot up it looks like it enters the arch_idle() state

I enabled the -d int logging to understand what is going on, I see the
following repeated many times continuosly here after

Taking exception 5 [IRQ]
...from EL1 to EL1
...with ESR 0x15/0x56000000
...with ELR 0xffffffff0000349c
...to EL1 PC 0xffffffff00008280 PSTATE 0x3c5

Here's the dissassembly for the relevant piece of code:

 ffffffff00003498 <arch_idle>:
 arch_idle():
 ../../kernel/arch/arm64/arch.cpp:182
 ffffffff00003498:       d503207f        wfi
 ffffffff0000349c:       d65f03c0        ret

I am trying to understand what exceptions are occurring exactly when kernel
is idle (timer?). According to above ELR is pointing to arch_idle(), but I
believe "wfi" instruction would not be an IRQ but a sync abort which is
handle differently right?

Also from ESR, it looks like a SVC instruction but if I am not wrong for
IRQs ESRs are not updated (considered)

One more thing, is there a way in QEMU I could find out what exception 5 is
corresponding to?


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