Re: [Qemu-devel] [PATCH v3] RISC-V: Fix riscv_isa_string memory size bug

[Richard W.M. Jones]

On Thu, Mar 22, 2018 at 02:06:24PM -0700, Michael Clark wrote:
> On Mon, Mar 19, 2018 at 2:39 PM, Michael Clark <address@hidden> wrote:
> > On Mon, Mar 19, 2018 at 12:42 PM, Richard W.M. Jones <address@hidden>
> > wrote:
> >> Did you see the problem with restoring floating point registers on
> >> context switch?  The test case is quite simple:
> >>
> >>   http://oirase.annexia.org/tmp/sched.c
> >
> > No I didn't. Thanks.
> From my local testing, it appears to only show up with SMP enabled. With 1
> CPU enabled the sched.c test passes.
> I'll could try and revert this and see if it makes any difference...
> however I think the float code has changed substantially with respect to
> handling of flags. We could backport the more conservative approach of
> handling MSTATUS_FS in the float routines. We should also run the test case
> on hardware to rule out linux-kernel MSTATUS_FS bugs...

DJ, am I remembering correctly that you tried the test case on the
HiFive evaluation board and it didn't demonstrate the bug?

Rich.

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