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[Qemu-devel] [PULL 14/19] hw/arm/raspi: Don't bother setting default_cpu
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 14/19] hw/arm/raspi: Don't bother setting default_cpu_type |
Date: |
Thu, 26 Apr 2018 11:47:10 +0100 |
In commit 210f47840dd62, we changed the bcm2836 SoC object to
always create a CPU of the correct type for that SoC model. This
makes the default_cpu_type settings in the MachineClass structs
for the raspi2 and raspi3 boards redundant. We didn't change
those at the time because it would have meant a temporary
regression in a corner case of error handling if the user
requested a non-existing CPU type. The -cpu parse handling
changes in 2278b93941d42c3 mean that it no longer implicitly
depends on default_cpu_type for this to work, so we can now
delete the redundant default_cpu_type fields.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
---
hw/arm/raspi.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 955a7c4e80..66899c28dc 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -226,7 +226,6 @@ static void raspi2_machine_init(MachineClass *mc)
mc->no_parallel = 1;
mc->no_floppy = 1;
mc->no_cdrom = 1;
- mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
mc->max_cpus = BCM283X_NCPUS;
mc->min_cpus = BCM283X_NCPUS;
mc->default_cpus = BCM283X_NCPUS;
@@ -249,7 +248,6 @@ static void raspi3_machine_init(MachineClass *mc)
mc->no_parallel = 1;
mc->no_floppy = 1;
mc->no_cdrom = 1;
- mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
mc->max_cpus = BCM283X_NCPUS;
mc->min_cpus = BCM283X_NCPUS;
mc->default_cpus = BCM283X_NCPUS;
--
2.17.0
- [Qemu-devel] [PULL 00/19] target-arm queue, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 07/19] target/arm: Mask PMU register writes based on PMCR_EL0.N, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 12/19] target/arm: Fix bitmask for PMCCFILTR writes, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 10/19] target/arm: Add pre-EL change hooks, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 11/19] target/arm: Allow EL change hooks to do IO, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 06/19] target/arm: Treat PMCCNTR as alias of PMCCNTR_EL0, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 14/19] hw/arm/raspi: Don't bother setting default_cpu_type,
Peter Maydell <=
- [Qemu-devel] [PULL 09/19] target/arm: Support multiple EL change hooks, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 13/19] target/arm: Make PMOVSCLR and PMUSERENR 64 bits wide, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 04/19] target/arm: Use v7m_stack_read() for reading the frame signature, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 15/19] hw/arm/highbank: don't make sysram 'nomigrate', Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 02/19] arm: always start from first_cpu when registering loader cpu reset callback, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 01/19] device_tree: Increase FDT_MAX_SIZE to 1 MiB, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 19/19] xilinx_spips: Correct SNOOP_NONE state when flushing the txfifo, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 17/19] hw/arm/aspeed_soc: don't use vmstate_register_ram_global for SRAM, Peter Maydell, 2018/04/26