Re: [Qemu-devel] [PATCH 04/19] fpu/softfloat: Canonicalize NaN fraction

[Richard Henderson]

On 05/11/2018 09:26 AM, Alex Bennée wrote:
> 
> Richard Henderson <address@hidden> writes:
> 
>> Shift the NaN fraction to a canonical position, much like we do
>> for the fraction of normal numbers.  Immediately, this simplifies
>> the float-to-float conversion.  Later, this will facilitate
>> manipulation of NaNs within the shared code paths.
>>
>> Signed-off-by: Richard Henderson <address@hidden>
>> ---
>>  fpu/softfloat.c | 13 ++++++-------
>>  1 file changed, 6 insertions(+), 7 deletions(-)
>>
>> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
>> index 5e4982b035..df377b6314 100644
>> --- a/fpu/softfloat.c
>> +++ b/fpu/softfloat.c
>> @@ -329,10 +329,11 @@ static FloatParts canonicalize(FloatParts part, const 
>> FloatFmt *parm,
>>          if (part.frac == 0) {
>>              part.cls = float_class_inf;
>>          } else {
>> +            part.frac <<= parm->frac_shift;
>>  #ifdef NO_SIGNALING_NANS
>>              part.cls = float_class_qnan;
>>  #else
>> -            int64_t msb = part.frac << (parm->frac_shift + 2);
>> +            int64_t msb = part.frac << 2;
>>              if ((msb < 0) == status->snan_bit_is_one) {
>>                  part.cls = float_class_snan;
>>              } else {
>> @@ -498,6 +499,7 @@ static FloatParts round_canonical(FloatParts p, 
>> float_status *s,
>>      case float_class_qnan:
>>      case float_class_snan:
>>          exp = exp_max;
>> +        frac >>= parm->frac_shift;
> 
> Unfortunately we now miss this step when we handle:
> 
>     case float_class_msnan:
>         return float64_maybe_silence_nan(float64_pack_raw(p), s);
> 
> This seems to fix that:
> 
> recanonicalise frac before packing and sending

Good catch.  Merged for bisection.


r~