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Re: [Qemu-devel] [PATCH v9 2/7] i386: Add new property to control cache
From: |
Eduardo Habkost |
Subject: |
Re: [Qemu-devel] [PATCH v9 2/7] i386: Add new property to control cache info |
Date: |
Mon, 14 May 2018 16:28:19 -0300 |
User-agent: |
Mutt/1.9.2 (2017-12-15) |
On Mon, May 14, 2018 at 11:41:51AM -0500, Babu Moger wrote:
> The property legacy-cache will be used to control the cache information.
> If user passes "-cpu legacy-cache" then older information will
> be displayed even if the hardware supports new information. Otherwise
> use the statically loaded cache definitions if available.
>
> Renamed the previous cache structures to legacy_*. If there is any change in
> the cache information, then it needs to be initialized in builtin_x86_defs.
>
> Signed-off-by: Babu Moger <address@hidden>
> Tested-by: Geoffrey McRae <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Queued, thanks.
--
Eduardo
- [Qemu-devel] [PATCH v9 0/7] i386: Enable TOPOEXT to support hyperthreading on AMD CPU, Babu Moger, 2018/05/14
- [Qemu-devel] [PATCH v9 1/7] pc: add 2.13 machine types, Babu Moger, 2018/05/14
- [Qemu-devel] [PATCH v9 3/7] i386: Populate AMD Processor Cache Information for cpuid 0x8000001D, Babu Moger, 2018/05/14
- [Qemu-devel] [PATCH v9 2/7] i386: Add new property to control cache info, Babu Moger, 2018/05/14
- Re: [Qemu-devel] [PATCH v9 2/7] i386: Add new property to control cache info,
Eduardo Habkost <=
- [Qemu-devel] [PATCH v9 4/7] i386: Clean up cache CPUID code, Babu Moger, 2018/05/14
- [Qemu-devel] [PATCH v9 5/7] i386: Add support for CPUID_8000_001E for AMD, Babu Moger, 2018/05/14
- [Qemu-devel] [PATCH v9 7/7] i386: Remove generic SMT thread check, Babu Moger, 2018/05/14
- [Qemu-devel] [PATCH v9 6/7] i386: Enable TOPOEXT feature on AMD EPYC CPU, Babu Moger, 2018/05/14