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Re: [Qemu-devel] [PATCH v2 10/36] target-microblaze: Bypass MMU with MMU
From: |
Edgar E. Iglesias |
Subject: |
Re: [Qemu-devel] [PATCH v2 10/36] target-microblaze: Bypass MMU with MMU_NOMMU_IDX |
Date: |
Tue, 15 May 2018 23:45:51 +0200 |
User-agent: |
NeoMutt/20170609 (1.8.3) |
On Wed, May 09, 2018 at 01:51:31PM -0700, Richard Henderson wrote:
> On 05/08/2018 10:31 AM, Edgar E. Iglesias wrote:
> > + if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)
> > + && mmu_idx != MMU_NOMMU_IDX) {
>
> For future cleanup, the first condition should be moved to cpu_mmu_index (the
> second condition is already there). At which point here you need check
> nothing
> but mmu_idx.
Thanks, I've added a followup patch that does this.
Cheers,
Edgar
- [Qemu-devel] [PATCH v2 00/36] target-microblaze: Add support for Extended Addressing, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 01/36] target-microblaze: dec_load: Use bool instead of unsigned int, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 02/36] target-microblaze: dec_store: Use bool instead of unsigned int, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 03/36] target-microblaze: compute_ldst_addr: Use bool instead of int, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 04/36] target-microblaze: Fallback to our latest CPU version, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 05/36] target-microblaze: Correct special register array sizes, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 06/36] target-microblaze: Correct the PVR array size, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 09/36] target-microblaze: Conditionalize setting of PVR11_USE_MMU, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 10/36] target-microblaze: Bypass MMU with MMU_NOMMU_IDX, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 08/36] target-microblaze: Remove USE_MMU PVR checks, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 11/36] target-microblaze: Make compute_ldst_addr always use a temp, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 07/36] target-microblaze: Tighten up TCGv_i32 vs TCGv type usage, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 12/36] target-microblaze: Remove pointer indirection for ld/st addresses, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 14/36] target-microblaze: Name special registers we support, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 13/36] target-microblaze: Use TCGv for load/store addresses, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 17/36] target-microblaze: dec_msr: Use bool and extract32, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 15/36] target-microblaze: Break out trap_userspace(), Edgar E. Iglesias, 2018/05/08