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[Qemu-devel] [PATCH v3 28/38] target-microblaze: dec_msr: Plug a temp le
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v3 28/38] target-microblaze: dec_msr: Plug a temp leak |
Date: |
Wed, 16 May 2018 20:51:36 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Plug a temp leak.
Reported-by: Richard Henderson <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/microblaze/translate.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 03a0289858..cf1b87c09e 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -516,12 +516,17 @@ static void dec_msr(DisasContext *dc)
#if !defined(CONFIG_USER_ONLY)
/* Catch read/writes to the mmu block. */
if ((sr & ~0xff) == 0x1000) {
+ TCGv_i32 tmp_sr;
+
sr &= 7;
+ tmp_sr = tcg_const_i32(sr);
LOG_DIS("m%ss sr%d r%d imm=%x\n", to ? "t" : "f", sr, dc->ra, dc->imm);
- if (to)
- gen_helper_mmu_write(cpu_env, tcg_const_i32(sr), cpu_R[dc->ra]);
- else
- gen_helper_mmu_read(cpu_R[dc->rd], cpu_env, tcg_const_i32(sr));
+ if (to) {
+ gen_helper_mmu_write(cpu_env, tmp_sr, cpu_R[dc->ra]);
+ } else {
+ gen_helper_mmu_read(cpu_R[dc->rd], cpu_env, tmp_sr);
+ }
+ tcg_temp_free_i32(tmp_sr);
return;
}
#endif
--
2.14.1
- [Qemu-devel] [PATCH v3 19/38] target-microblaze: dec_msr: Fix MTS to FSR, (continued)
- [Qemu-devel] [PATCH v3 19/38] target-microblaze: dec_msr: Fix MTS to FSR, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 17/38] target-microblaze: dec_msr: Use bool and extract32, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 20/38] target-microblaze: Make special registers 64-bit, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 23/38] target-microblaze: Implement MFSE EAR, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 21/38] target-microblaze: Setup for 64bit addressing, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 24/38] target-microblaze: mmu: Add R_TBLX_MISS macros, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 25/38] target-microblaze: mmu: Remove unused register state, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 26/38] target-microblaze: mmu: Prepare for 64-bit addresses, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 27/38] target-microblaze: mmu: Add a configurable output address mask, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 28/38] target-microblaze: dec_msr: Plug a temp leak,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v3 30/38] target-microblaze: Allow address sizes between 32 and 64 bits, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 32/38] target-microblaze: mmu: Cleanup debug log messages, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 33/38] target-microblaze: Use table based condition-codes conversion, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 29/38] target-microblaze: Add support for extended access to TLBLO, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 31/38] target-microblaze: Simplify address computation using tcg_gen_addi_i32(), Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 34/38] target-microblaze: Remove argument b in eval_cc(), Edgar E. Iglesias, 2018/05/16