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Re: [Qemu-devel] [PATCH 05/20] target/openrisc: Split out is_user
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [PATCH 05/20] target/openrisc: Split out is_user |
Date: |
Sun, 27 May 2018 22:33:09 -0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 |
On 05/27/2018 11:13 AM, Richard Henderson wrote:
> This allows us to limit the amount of ifdefs and isolate
> the test for usermode.
>
> Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> target/openrisc/translate.c | 27 ++++++++++++---------------
> 1 file changed, 12 insertions(+), 15 deletions(-)
>
> diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
> index a8afb9a562..61e6deef69 100644
> --- a/target/openrisc/translate.c
> +++ b/target/openrisc/translate.c
> @@ -54,6 +54,15 @@ typedef struct DisasContext {
> target_ulong jmp_pc_imm;
> } DisasContext;
>
> +static inline bool is_user(DisasContext *dc)
> +{
> +#ifdef CONFIG_USER_ONLY
> + return true;
> +#else
> + return dc->mem_idx == MMU_USER_IDX;
> +#endif
> +}
> +
> /* Include the auto-generated decoder. */
> #include "decode.inc.c"
>
> @@ -914,17 +923,13 @@ static bool trans_l_mfspr(DisasContext *dc, arg_l_mfspr
> *a, uint32_t insn)
> LOG_DIS("l.mfspr r%d, r%d, %d\n", a->d, a->a, a->k);
> check_r0_write(a->d);
>
> -#ifdef CONFIG_USER_ONLY
> - gen_illegal_exception(dc);
> -#else
> - if (dc->mem_idx == MMU_USER_IDX) {
> + if (is_user(dc)) {
> gen_illegal_exception(dc);
> } else {
> TCGv_i32 ti = tcg_const_i32(a->k);
> gen_helper_mfspr(cpu_R[a->d], cpu_env, cpu_R[a->d], cpu_R[a->a], ti);
> tcg_temp_free_i32(ti);
> }
> -#endif
> return true;
> }
>
> @@ -932,17 +937,13 @@ static bool trans_l_mtspr(DisasContext *dc, arg_l_mtspr
> *a, uint32_t insn)
> {
> LOG_DIS("l.mtspr r%d, r%d, %d\n", a->a, a->b, a->k);
>
> -#ifdef CONFIG_USER_ONLY
> - gen_illegal_exception(dc);
> -#else
> - if (dc->mem_idx == MMU_USER_IDX) {
> + if (is_user(dc)) {
> gen_illegal_exception(dc);
> } else {
> TCGv_i32 ti = tcg_const_i32(a->k);
> gen_helper_mtspr(cpu_env, cpu_R[a->a], cpu_R[a->b], ti);
> tcg_temp_free_i32(ti);
> }
> -#endif
> return true;
> }
>
> @@ -1204,16 +1205,12 @@ static bool trans_l_rfe(DisasContext *dc, arg_l_rfe
> *a, uint32_t insn)
> {
> LOG_DIS("l.rfe\n");
>
> -#ifdef CONFIG_USER_ONLY
> - gen_illegal_exception(dc);
> -#else
> - if (dc->mem_idx == MMU_USER_IDX) {
> + if (is_user(dc)) {
> gen_illegal_exception(dc);
> } else {
> gen_helper_rfe(cpu_env);
> dc->base.is_jmp = DISAS_EXIT;
> }
> -#endif
> return true;
> }
>
>
- [Qemu-devel] [PATCH 00/20] target/openrisc improvements, Richard Henderson, 2018/05/27
- [Qemu-devel] [PATCH 02/20] target/openrisc: Use exit_tb instead of CPU_INTERRUPT_EXITTB, Richard Henderson, 2018/05/27
- [Qemu-devel] [PATCH 01/20] target/openrisc: Remove DISAS_JUMP & DISAS_TB_JUMP, Richard Henderson, 2018/05/27
- [Qemu-devel] [PATCH 03/20] target/openrisc: Fix singlestep_enabled, Richard Henderson, 2018/05/27
- [Qemu-devel] [PATCH 05/20] target/openrisc: Split out is_user, Richard Henderson, 2018/05/27
- [Qemu-devel] [PATCH 04/20] target/openrisc: Link more translation blocks, Richard Henderson, 2018/05/27
- [Qemu-devel] [PATCH 08/20] target/openrisc: Merge tlb allocation into CPUOpenRISCState, Richard Henderson, 2018/05/27
- [Qemu-devel] [PATCH 10/20] target/openrisc: Merge mmu_helper.c into mmu.c, Richard Henderson, 2018/05/27
- [Qemu-devel] [PATCH 06/20] target/openrisc: Exit the TB after l.mtspr, Richard Henderson, 2018/05/27
- [Qemu-devel] [PATCH 07/20] target/openrisc: Form the spr index from tcg, Richard Henderson, 2018/05/27