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[Qemu-devel] [Bug 1774605] Re: PowerPC guest does not emulate L2 and L3


From: Satheesh Rajendran
Subject: [Qemu-devel] [Bug 1774605] Re: PowerPC guest does not emulate L2 and L3 cache for KVM vCPUs
Date: Fri, 01 Jun 2018 08:50:27 -0000

Guest xml(cpu portion):

...
   <vcpu placement='static' current='16'>32</vcpu>
  <resource>
    <partition>/machine</partition>
  </resource>
  <os>
    <type arch='ppc64le' machine='pseries-2.13'>hvm</type>
    <kernel>/home/kvmci/linux/vmlinux</kernel>
    <cmdline>root=/dev/sda2 rw console=tty0 console=ttyS0,115200 
init=/sbin/init initcall_debug</cmdline>
    <boot dev='hd'/>
  </os>
  <cpu mode='host-passthrough' check='none'>
    <topology sockets='2' cores='2' threads='8'/>
  </cpu>
...


Host lscpu:
# lscpu
Architecture:         ppc64le
Byte Order:           Little Endian
CPU(s):               80
On-line CPU(s) list:  0,8,16,24,32,40,48,56,64,72
Off-line CPU(s) list: 1-7,9-15,17-23,25-31,33-39,41-47,49-55,57-63,65-71,73-79
Thread(s) per core:   1
Core(s) per socket:   5
Socket(s):            2
NUMA node(s):         2
Model:                2.1 (pvr 004b 0201)
Model name:           POWER8E (raw), altivec supported
CPU max MHz:          3690.0000
CPU min MHz:          2061.0000
L1d cache:            64K
L1i cache:            32K
L2 cache:             512K
L3 cache:             8192K
NUMA node0 CPU(s):    0,8,16,24,32
NUMA node1 CPU(s):    40,48,56,64,72

-- 
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https://bugs.launchpad.net/bugs/1774605

Title:
  PowerPC guest does not emulate L2 and L3 cache for KVM vCPUs

Status in QEMU:
  New

Bug description:
  PowerPC KVM guest does not emulate L2 and L2 caches for vCPU, it would
  be good to have them enabled if not any known issues/limitation
  already with PowerPC.

  Host Env:
  kernel: 4.17.0-rc7-00045-g0512e0134582
  qemu: v2.12.0-923-gc181ddaa17-dirty
  #libvirtd -V
  libvirtd (libvirt) 4.4.0

  
  Guest Kernel:
  # uname -a
  Linux atest-guest 4.17.0-rc7-00045-g0512e0134582 #9 SMP Fri Jun 1 02:55:50 
EDT 2018 ppc64le ppc64le ppc64le GNU/Linux

  Guest:
  # lscpu
  Architecture:        ppc64le
  Byte Order:          Little Endian
  CPU(s):              16
  On-line CPU(s) list: 0-15
  Thread(s) per core:  8
  Core(s) per socket:  2
  Socket(s):           1
  NUMA node(s):        1
  Model:               2.1 (pvr 004b 0201)
  Model name:          POWER8 (architected), altivec supported
  Hypervisor vendor:   KVM
  Virtualization type: para
  L1d cache:           64K
  L1i cache:           32K
  NUMA node0 CPU(s):   0-15


  background: x86 enabling cpu L2 cache bydefault and L3 cache on demand for 
kvm guest
  and claims performance improvement as vcpus can be 
  benefited with lesser `vmexits due to guest send IPIs.` with L3 cache 
enabled, below was patch for same.

  
https://git.qemu.org/?p=qemu.git;a=commit;h=14c985cffa6cb177fc01a163d8bcf227c104718c

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