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Re: [Qemu-devel] [PATCH] ahci: fix FIS I bit and PIO Setup FIS interrupt
From: |
Paolo Bonzini |
Subject: |
Re: [Qemu-devel] [PATCH] ahci: fix FIS I bit and PIO Setup FIS interrupt |
Date: |
Fri, 22 Jun 2018 10:58:18 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 |
On 21/06/2018 22:06, John Snow wrote:
>
> On 06/20/2018 09:25 AM, Paolo Bonzini wrote:
>> + pio_fis_i = is_atapi ? ad->done_atapi_packet : !is_write;
> Per DPIOO1, does this go to false for the first DRQ block, or did I
> misunderstand? Currently my understanding:
DPIOO1 is the !is_atapi && is_write case, where I is currently always 0.
When do we have more than one DRQ block, is it for multi-sector PIO
reads? Then perhaps we need something like ad->command->done_first_pio.
Paolo
> - device->host
> DPIOI1
> Interrupt bit shall be set.
> - host->device:
> DPIOO1:
> 0 for first block, 1 otherwise
> - ATAPI:
> 0 for packet itself
> 1 for all data otherwise.