Re: [Qemu-devel] [PATCH v5 07/35] target/arm: Implement SVE FP Multiply-Add Group

[Peter Maydell]

On 21 June 2018 at 02:53, Richard Henderson
<address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target/arm/helper-sve.h    |  16 ++++
>  target/arm/sve_helper.c    | 158 +++++++++++++++++++++++++++++++++++++
>  target/arm/translate-sve.c |  49 ++++++++++++
>  target/arm/sve.decode      |  17 ++++
>  4 files changed, 240 insertions(+)

> diff --git a/target/arm/sve.decode b/target/arm/sve.decode
> index 636212a638..70e5a3aeb5 100644
> --- a/target/arm/sve.decode
> +++ b/target/arm/sve.decode
> @@ -128,6 +128,8 @@
>                  &rprrr_esz ra=%reg_movprfx
>  @rdn_pg_ra_rm   ........ esz:2 . rm:5  ... pg:3 ra:5 rd:5 \
>                  &rprrr_esz rn=%reg_movprfx
> address@hidden   ........ esz:2 . ra:5  ... pg:3 rm:5 rd:5 \
> +                &rprrr_esz rn=%reg_movprfx

>  # One register operand, with governing predicate, vector element size
>  @rd_pg_rn       ........ esz:2 ... ... ... pg:3 rn:5 rd:5       &rpr_esz
> @@ -701,6 +703,21 @@ FMULX           01100101 .. 00 1010 100 ... ..... .....  
>   @rdn_pg_rm
>  FDIV            01100101 .. 00 1100 100 ... ..... .....    @rdm_pg_rn # FDIVR
>  FDIV            01100101 .. 00 1101 100 ... ..... .....    @rdn_pg_rm
>
> +### SVE FP Multiply-Add Group
> +
> +# SVE floating-point multiply-accumulate writing addend
> +FMLA_zpzzz      01100101 .. 1 ..... 000 ... ..... .....         @rda_pg_rn_rm
> +FMLS_zpzzz      01100101 .. 1 ..... 001 ... ..... .....         @rda_pg_rn_rm
> +FNMLA_zpzzz     01100101 .. 1 ..... 010 ... ..... .....         @rda_pg_rn_rm
> +FNMLS_zpzzz     01100101 .. 1 ..... 011 ... ..... .....         @rda_pg_rn_rm
> +
> +# SVE floating-point multiply-accumulate writing multiplicand
> +# FMAD, FMSB, FNMAD, FNMS
> +FMLA_zpzzz      01100101 .. 1 ..... 100 ... ..... .....         @rdn_pg_rm_ra
> +FMLS_zpzzz      01100101 .. 1 ..... 101 ... ..... .....         @rdn_pg_rm_ra
> +FNMLA_zpzzz     01100101 .. 1 ..... 110 ... ..... .....         @rdn_pg_rm_ra
> +FNMLS_zpzzz     01100101 .. 1 ..... 111 ... ..... .....         @rdn_pg_rm_ra

It's not clear to me how we can implement both of these groups
with the same functions. Some commentary might help.

thanks
-- PMM