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[Qemu-devel] [PATCH v3 03/20] arm64: Add a helper for PARange to physica
From: |
Suzuki K Poulose |
Subject: |
[Qemu-devel] [PATCH v3 03/20] arm64: Add a helper for PARange to physical shift conversion |
Date: |
Fri, 29 Jun 2018 12:15:23 +0100 |
On arm64, ID_AA64MMFR0_EL1.PARange encodes the maximum Physical
Address range supported by the CPU. Add a helper to decode this
to actual physical shift. If we hit an unallocated value, return
the maximum range supported by the kernel.
This is will be used by the KVM to set the VTCR_EL2.T0SZ, as it
is about to move its place. Having this helper keeps the code
movement cleaner.
Cc: Catalin Marinas <address@hidden>
Cc: Marc Zyngier <address@hidden>
Cc: James Morse <address@hidden>
Cc: Christoffer Dall <address@hidden>
Signed-off-by: Suzuki K Poulose <address@hidden>
---
Changes since V2:
- Split the patch
- Limit the physical shift only for values unrecognized.
---
arch/arm64/include/asm/cpufeature.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/include/asm/cpufeature.h
b/arch/arm64/include/asm/cpufeature.h
index 1717ba1..855cf0e 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -530,6 +530,19 @@ void arm64_set_ssbd_mitigation(bool state);
static inline void arm64_set_ssbd_mitigation(bool state) {}
#endif
+static inline u32 id_aa64mmfr0_parange_to_phys_shift(int parange)
+{
+ switch (parange) {
+ case 0: return 32;
+ case 1: return 36;
+ case 2: return 40;
+ case 3: return 42;
+ case 4: return 44;
+ case 5: return 48;
+ case 6: return 52;
+ default: return CONFIG_ARM64_PA_BITS;
+ }
+}
#endif /* __ASSEMBLY__ */
#endif
--
2.7.4
- [Qemu-devel] [PATCH v3 00/20] arm64: Dynamic & 52bit IPA support, Suzuki K Poulose, 2018/06/29
- [Qemu-devel] [PATCH v3 01/20] virtio: mmio-v1: Validate queue PFN, Suzuki K Poulose, 2018/06/29
- [Qemu-devel] [PATCH v3 02/20] virtio: pci-legacy: Validate queue pfn, Suzuki K Poulose, 2018/06/29
- [Qemu-devel] [PATCH v3 03/20] arm64: Add a helper for PARange to physical shift conversion,
Suzuki K Poulose <=
- [Qemu-devel] [PATCH v3 04/20] kvm: arm64: Clean up VTCR_EL2 initialisation, Suzuki K Poulose, 2018/06/29
- [Qemu-devel] [PATCH v3 05/20] kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table, Suzuki K Poulose, 2018/06/29
- [Qemu-devel] [PATCH v3 06/20] kvm: arm/arm64: Remove spurious WARN_ON, Suzuki K Poulose, 2018/06/29
- [Qemu-devel] [PATCH v3 07/20] kvm: arm/arm64: Prepare for VM specific stage2 translations, Suzuki K Poulose, 2018/06/29
- [Qemu-devel] [PATCH v3 08/20] kvm: arm/arm64: Abstract stage2 pgd table allocation, Suzuki K Poulose, 2018/06/29
- [Qemu-devel] [PATCH v3 10/20] kvm: arm64: Dynamic configuration of VTTBR mask, Suzuki K Poulose, 2018/06/29