Re: [Qemu-devel] [PATCH v6 23/77] target/mips: Add emulation of nanoMIPS 16-bit load and store instructions

[Richard Henderson]

On 08/02/2018 10:16 AM, Stefan Markovic wrote:
>      case NM_P16_LB:
> +        switch (extract32(ctx->opcode, 2, 2)) {
> +        case NM_LB16:
> +            offset = extract32(ctx->opcode, 0, 2);
> +            gen_ld(ctx, OPC_LB, rt, rs, offset);
> +            break;
> +        case NM_SB16:
> +            offset = decode_gpr_gpr3_src_store(
> +                         NANOMIPS_EXTRACT_RD(ctx->opcode));
> +            gen_st(ctx, OPC_SB, rt, rs, offset);

That looks wrong.  I think you want

    rt = decode_gpr_gpr3_src_store(...);
    offset = extract32(ctx->opcode, 0, 2);

here.

>      case NM_P16_LH:
> +        switch ((extract32(ctx->opcode, 3, 1) << 1) | (ctx->opcode & 1)) {
> +        case NM_LH16:
> +            offset = extract32(ctx->opcode, 1, 2) << 1;
> +            gen_ld(ctx, OPC_LH, rt, rs, offset);
> +            break;
> +        case NM_SH16:
> +            offset = decode_gpr_gpr3_src_store(
> +                         NANOMIPS_EXTRACT_RD(ctx->opcode));
> +            gen_st(ctx, OPC_SH, rt, rs, offset);

Similarly.


r~