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Re: [Qemu-devel] [PATCH] hw/timer/m48t59: Move away from old_mmio access


From: Philippe Mathieu-Daudé
Subject: Re: [Qemu-devel] [PATCH] hw/timer/m48t59: Move away from old_mmio accessors
Date: Thu, 2 Aug 2018 16:05:29 -0300
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1

On 08/02/2018 03:06 PM, Peter Maydell wrote:
> Move the m48t59 device away from using old_mmio MemoryRegionOps
> accessors.
> 
> Signed-off-by: Peter Maydell <address@hidden>

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>

> ---
> Tested with 'make check' and by booting a sparc guest.
> 
>  hw/timer/m48t59.c | 59 +++++++++--------------------------------------
>  1 file changed, 11 insertions(+), 48 deletions(-)
> 
> diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
> index f2991762ab0..ca3ed445de7 100644
> --- a/hw/timer/m48t59.c
> +++ b/hw/timer/m48t59.c
> @@ -493,66 +493,29 @@ static uint64_t NVRAM_readb(void *opaque, hwaddr addr, 
> unsigned size)
>      return retval;
>  }
>  
> -static void nvram_writeb (void *opaque, hwaddr addr, uint32_t value)
> -{
> -    M48t59State *NVRAM = opaque;
> -
> -    m48t59_write(NVRAM, addr, value & 0xff);
> -}
> -
> -static void nvram_writew (void *opaque, hwaddr addr, uint32_t value)
> -{
> -    M48t59State *NVRAM = opaque;
> -
> -    m48t59_write(NVRAM, addr, (value >> 8) & 0xff);
> -    m48t59_write(NVRAM, addr + 1, value & 0xff);
> -}
> -
> -static void nvram_writel (void *opaque, hwaddr addr, uint32_t value)
> -{
> -    M48t59State *NVRAM = opaque;
> -
> -    m48t59_write(NVRAM, addr, (value >> 24) & 0xff);
> -    m48t59_write(NVRAM, addr + 1, (value >> 16) & 0xff);
> -    m48t59_write(NVRAM, addr + 2, (value >> 8) & 0xff);
> -    m48t59_write(NVRAM, addr + 3, value & 0xff);
> -}
> -
> -static uint32_t nvram_readb (void *opaque, hwaddr addr)
> +static uint64_t nvram_read(void *opaque, hwaddr addr, unsigned size)
>  {
>      M48t59State *NVRAM = opaque;
>  
>      return m48t59_read(NVRAM, addr);
>  }
>  
> -static uint32_t nvram_readw (void *opaque, hwaddr addr)
> +static void nvram_write(void *opaque, hwaddr addr, uint64_t value,
> +                        unsigned size)
>  {
>      M48t59State *NVRAM = opaque;
> -    uint32_t retval;
>  
> -    retval = m48t59_read(NVRAM, addr) << 8;
> -    retval |= m48t59_read(NVRAM, addr + 1);
> -    return retval;
> -}
> -
> -static uint32_t nvram_readl (void *opaque, hwaddr addr)
> -{
> -    M48t59State *NVRAM = opaque;
> -    uint32_t retval;
> -
> -    retval = m48t59_read(NVRAM, addr) << 24;
> -    retval |= m48t59_read(NVRAM, addr + 1) << 16;
> -    retval |= m48t59_read(NVRAM, addr + 2) << 8;
> -    retval |= m48t59_read(NVRAM, addr + 3);
> -    return retval;
> +    return m48t59_write(NVRAM, addr, value);
>  }
>  
>  static const MemoryRegionOps nvram_ops = {
> -    .old_mmio = {
> -        .read = { nvram_readb, nvram_readw, nvram_readl, },
> -        .write = { nvram_writeb, nvram_writew, nvram_writel, },
> -    },
> -    .endianness = DEVICE_NATIVE_ENDIAN,
> +    .read = nvram_read,
> +    .write = nvram_write,
> +    .impl.min_access_size = 1,
> +    .impl.max_access_size = 1,
> +    .valid.min_access_size = 1,
> +    .valid.max_access_size = 4,
> +    .endianness = DEVICE_BIG_ENDIAN,
>  };
>  
>  static const VMStateDescription vmstate_m48t59 = {
> 



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