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[Qemu-devel] [PATCH 06/11] target/arm: Fix sign-extension in sve do_ldr/
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 06/11] target/arm: Fix sign-extension in sve do_ldr/do_str |
Date: |
Wed, 8 Aug 2018 20:40:28 -0700 |
The expression (int) imm + (uint32_t) len_align turns into uint32_t
and thus with negative imm produces a memory operation at the wrong
offset. None of the numbers involved are particularly large, so
change everything to use int.
Cc: address@hidden (3.0.1)
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate-sve.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 89efc80ee7..9e63b5f8e5 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -4372,12 +4372,11 @@ static bool trans_UCVTF_dd(DisasContext *s, arg_rpr_esz
*a, uint32_t insn)
* The load should begin at the address Rn + IMM.
*/
-static void do_ldr(DisasContext *s, uint32_t vofs, uint32_t len,
- int rn, int imm)
+static void do_ldr(DisasContext *s, uint32_t vofs, int len, int rn, int imm)
{
- uint32_t len_align = QEMU_ALIGN_DOWN(len, 8);
- uint32_t len_remain = len % 8;
- uint32_t nparts = len / 8 + ctpop8(len_remain);
+ int len_align = QEMU_ALIGN_DOWN(len, 8);
+ int len_remain = len % 8;
+ int nparts = len / 8 + ctpop8(len_remain);
int midx = get_mem_index(s);
TCGv_i64 addr, t0, t1;
@@ -4458,12 +4457,11 @@ static void do_ldr(DisasContext *s, uint32_t vofs,
uint32_t len,
}
/* Similarly for stores. */
-static void do_str(DisasContext *s, uint32_t vofs, uint32_t len,
- int rn, int imm)
+static void do_str(DisasContext *s, uint32_t vofs, int len, int rn, int imm)
{
- uint32_t len_align = QEMU_ALIGN_DOWN(len, 8);
- uint32_t len_remain = len % 8;
- uint32_t nparts = len / 8 + ctpop8(len_remain);
+ int len_align = QEMU_ALIGN_DOWN(len, 8);
+ int len_remain = len % 8;
+ int nparts = len / 8 + ctpop8(len_remain);
int midx = get_mem_index(s);
TCGv_i64 addr, t0;
--
2.17.1
- [Qemu-devel] [PATCH 02/11] target/arm: Fix typo in do_sat_addsub_64, (continued)
- [Qemu-devel] [PATCH 02/11] target/arm: Fix typo in do_sat_addsub_64, Richard Henderson, 2018/08/08
- [Qemu-devel] [PATCH 01/11] target/arm: Fix sign of sve_cmpeq_ppzw/sve_cmpne_ppzw, Richard Henderson, 2018/08/08
- [Qemu-devel] [PATCH 03/11] target/arm: Reorganize SVE WHILE, Richard Henderson, 2018/08/08
- [Qemu-devel] [PATCH 04/11] target/arm: Fix typo in helper_sve_movz_d, Richard Henderson, 2018/08/08
- [Qemu-devel] [PATCH 05/11] target/arm: Fix typo in helper_sve_ld1hss_r, Richard Henderson, 2018/08/08
- [Qemu-devel] [PATCH 07/11] target/arm: Fix offset for LD1R instructions, Richard Henderson, 2018/08/08
- [Qemu-devel] [PATCH 06/11] target/arm: Fix sign-extension in sve do_ldr/do_str,
Richard Henderson <=
- [Qemu-devel] [PATCH 08/11] target/arm: Fix offset scaling for LD_zprr and ST_zprr, Richard Henderson, 2018/08/08
- [Qemu-devel] [PATCH 10/11] target/arm: Dump SVE state if enabled, Richard Henderson, 2018/08/08
- [Qemu-devel] [PATCH 09/11] target/arm: Reformat integer register dump, Richard Henderson, 2018/08/08
- [Qemu-devel] [PATCH 11/11] target/arm: Add sve-max-vq cpu property to -cpu max, Richard Henderson, 2018/08/08