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[Qemu-devel] [PATCH v8 44/87] target/mips: Implement MT ASE support for
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v8 44/87] target/mips: Implement MT ASE support for nanoMIPS |
Date: |
Mon, 13 Aug 2018 19:53:09 +0200 |
From: Stefan Markovic <address@hidden>
Add emulation of MT ASE instructions for nanoMIPS.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
---
target/mips/translate.c | 85 +++++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 83 insertions(+), 2 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 632fac5..7be2128 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -16854,7 +16854,7 @@ static void gen_pool16c_nanomips_insn(DisasContext *ctx)
}
}
-static void gen_pool32a0_nanomips_insn(DisasContext *ctx)
+static void gen_pool32a0_nanomips_insn(CPUMIPSState *env, DisasContext *ctx)
{
int rt = extract32(ctx->opcode, 21, 5);
int rs = extract32(ctx->opcode, 16, 5);
@@ -17022,6 +17022,87 @@ static void gen_pool32a0_nanomips_insn(DisasContext
*ctx)
tcg_temp_free(t0);
}
break;
+ case NM_D_E_MT_VPE:
+ {
+ uint8_t sc = extract32(ctx->opcode, 10, 1);
+ TCGv t0 = tcg_temp_new();
+
+ switch (sc) {
+ case 0:
+ if (rs == 1) {
+ /* DMT */
+ check_cp0_mt(ctx);
+ gen_helper_dmt(t0);
+ gen_store_gpr(t0, rt);
+ } else if (rs == 0) {
+ /* DVPE */
+ check_cp0_mt(ctx);
+ gen_helper_dvpe(t0, cpu_env);
+ gen_store_gpr(t0, rt);
+ } else {
+ generate_exception_end(ctx, EXCP_RI);
+ }
+ break;
+ case 1:
+ if (rs == 1) {
+ /* EMT */
+ check_cp0_mt(ctx);
+ gen_helper_emt(t0);
+ gen_store_gpr(t0, rt);
+ } else if (rs == 0) {
+ /* EVPE */
+ check_cp0_mt(ctx);
+ gen_helper_evpe(t0, cpu_env);
+ gen_store_gpr(t0, rt);
+ } else {
+ generate_exception_end(ctx, EXCP_RI);
+ }
+ break;
+ }
+
+ tcg_temp_free(t0);
+ }
+ break;
+ case NM_FORK:
+ check_mt(ctx);
+ {
+ TCGv t0 = tcg_temp_new();
+ TCGv t1 = tcg_temp_new();
+
+ gen_load_gpr(t0, rt);
+ gen_load_gpr(t1, rs);
+ gen_helper_fork(t0, t1);
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+ }
+ break;
+ case NM_MFTR:
+ case NM_MFHTR:
+ check_cp0_enabled(ctx);
+ if (rd == 0) {
+ /* Treat as NOP. */
+ return;
+ }
+ gen_mftr(env, ctx, rs, rt, extract32(ctx->opcode, 10, 1),
+ extract32(ctx->opcode, 11, 5), extract32(ctx->opcode, 3, 1));
+ break;
+ case NM_MTTR:
+ case NM_MTHTR:
+ check_cp0_enabled(ctx);
+ gen_mttr(env, ctx, rs, rt, extract32(ctx->opcode, 10, 1),
+ extract32(ctx->opcode, 11, 5), extract32(ctx->opcode, 3, 1));
+ break;
+ case NM_YIELD:
+ check_mt(ctx);
+ {
+ TCGv t0 = tcg_temp_new();
+
+ gen_load_gpr(t0, rs);
+ gen_helper_yield(t0, cpu_env, t0);
+ gen_store_gpr(t0, rt);
+ tcg_temp_free(t0);
+ }
+ break;
#endif
default:
generate_exception_end(ctx, EXCP_RI);
@@ -17745,7 +17826,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env,
DisasContext *ctx)
case NM_POOL32A:
switch (ctx->opcode & 0x07) {
case NM_POOL32A0:
- gen_pool32a0_nanomips_insn(ctx);
+ gen_pool32a0_nanomips_insn(env, ctx);
break;
case NM_POOL32A7:
switch (extract32(ctx->opcode, 3, 3)) {
--
2.7.4
- [Qemu-devel] [PATCH v8 74/87] linux-user: Add target_cpu.h header for nanoMIPS, (continued)
- [Qemu-devel] [PATCH v8 74/87] linux-user: Add target_cpu.h header for nanoMIPS, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 60/87] elf: Don't check FCR31_NAN2008 bit for nanoMIPS, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 71/87] linux-user: Add target_fcntl.h header for nanoMIPS, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 80/87] linux-user: Amend support for sigaction() syscall for nanoMIPS, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 70/87] linux-user: Update syscall_defs.h header for nanoMIPS, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 81/87] linux-user: Add support for statx() syscall for all platforms, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 73/87] linux-user: Add target_syscall.h header for nanoMIPS, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 85/87] gdbstub: Disable handling of nanoMIPS ISA bit in the MIPS gdbstub, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 67/87] linux-user: Add syscall numbers for nanoMIPS, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 32/87] target/mips: Add emulation of some common nanoMIPS 32-bit instructions, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 44/87] target/mips: Implement MT ASE support for nanoMIPS,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v8 48/87] target/mips: Add emulation of DSP ASE for nanoMIPS - part 4, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 66/87] elf: Add nanoMIPS specific variations in ELF header fields, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 76/87] linux-user: Add target_elf.h header for nanoMIPS, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 78/87] linux-user: Add support for nanoMIPS signal trampoline, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 87/87] qemu-doc: Add nanoMIPS-related items, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 45/87] target/mips: Add emulation of DSP ASE for nanoMIPS - part 1, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 82/87] linux-user: Add support for nanoMIPS core files, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 84/87] linux-user: Add nanoMIPS support in scripts/qemu-binfmt-conf.sh, Aleksandar Markovic, 2018/08/13
- [Qemu-devel] [PATCH v8 86/87] gdbstub: Add XML support for GDB for nanoMIPS, Aleksandar Markovic, 2018/08/13