Re: [Qemu-devel] [PATCH v9 47/84] target/mips: Add emulation of DSP ASE for nanoMIPS - part 6

[Richard Henderson]

On 08/16/2018 07:57 AM, Aleksandar Markovic wrote:
> From: Stefan Markovic <address@hidden>
> 
> Add emulation of DSP ASE instructions for nanoMIPS - part 6.
> 
> Reviewed-by: Aleksandar Markovic <address@hidden>
> Signed-off-by: Aleksandar Markovic <address@hidden>
> Signed-off-by: Stefan Markovic <address@hidden>
> ---
>  target/mips/translate.c | 62 
> +++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 62 insertions(+)
> 
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 420a296..02ae3d9 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -17777,6 +17777,64 @@ static void 
> gen_pool32axf_4_nanomips_insn(DisasContext *ctx, uint32_t opc,
>      tcg_temp_free(t0);
>  }
>  
> +static void gen_pool32axf_7_nanomips_insn(DisasContext *ctx, uint32_t opc,
> +                                          int rt, int rs, int rd)
> +{
> +    TCGv t0;
> +    TCGv rs_t;
> +
> +    if (rt == 0) {
> +        /* Treat as NOP. */
> +        return;
> +    }

This...

> +
> +    t0 = tcg_temp_new();
> +    rs_t = tcg_temp_new();
> +
> +    gen_load_gpr(rs_t, rs);
> +
> +    switch (opc) {
> +    case NM_SHRA_R_QB:
> +        check_dspr2(ctx);

... misses out on these checks.
Better off with the gen_store_gpr calls from the other ASE patches.


r~