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[Qemu-devel] [PULL v2 00/15] MIPS queue for QEMU upstream, August 16, 20


From: Aleksandar Markovic
Subject: [Qemu-devel] [PULL v2 00/15] MIPS queue for QEMU upstream, August 16, 2018
Date: Thu, 16 Aug 2018 19:48:52 +0200

From: Aleksandar Markovic <address@hidden>

The following changes since commit c542a9f9794ec8e0bc3fcf5956d3cc8bce667789:

  Merge remote-tracking branch 'remotes/armbru/tags/pull-tests-2018-08-16' into 
staging (2018-08-16 09:50:54 +0100)

are available in the git repository at:

  https://github.com/AMarkovic/qemu tags/mips-queue-aug-2018

for you to fetch changes up to 8639c5c95472ee79391a7e7826d1af23948b71f6:

  qemu-doc: Amend MIPS-related items (2018-08-16 19:18:45 +0200)

----------------------------------------------------------------
MIPS queue for QEMU upstream, August 16, 2018

This is v2 of the pull request sent on August 14, 2018 - in
this pull request clang build errors are fixed. The pull request
is based on the first part (patches 1-15) of v9 of the nanoMIPS
support series.

  - gcc/clang bisect were tested to work (build ok after each
    patch).
  - Two occurences of "O64" are replaced with "N64" in the last
    patch, as minor corrections.
  - "Reviewed-by" lines were also updated compared to v9.

-----------------------------------------------------------------
Aleksandar Markovic (9):
  MAINTAINERS: Update target/mips maintainer's email addresses
  target/mips: Avoid case statements formulated by ranges - part 1
  target/mips: Mark switch fallthroughs with interpretable comments
  target/mips: Fix two instances of shadow variables
  target/mips: Update some CP0 registers bit definitions
  elf: Remove duplicate preprocessor constant definition
  elf: Add ELF flags for MIPS machine variants
  linux-user: Update MIPS syscall numbers up to kernel 4.18 headers
  qemu-doc: Amend MIPS-related items

Aleksandar Rikalo (2):
  target/mips: Avoid case statements formulated by ranges - part 2
  linux-user: Add preprocessor availability control to some syscalls

Stefan Markovic (2):
  target/mips: Add CP0 BadInstrX register
  target/mips: Implement CP0 Config1.WR bit functionality

Yongbok Kim (2):
  target/mips: Don't update BadVAddr register in Debug Mode
  target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0

 .mailmap                       |   7 +-
 MAINTAINERS                    |   9 +-
 include/elf.h                  |  24 ++-
 linux-user/mips/syscall_nr.h   |   9 +
 linux-user/mips64/syscall_nr.h |  18 ++
 linux-user/strace.c            |  14 +-
 linux-user/syscall.c           |  29 ++++
 qemu-doc.texi                  |  13 +-
 target/mips/cpu.h              | 158 +++++++++--------
 target/mips/helper.c           |   4 +-
 target/mips/machine.c          |   5 +-
 target/mips/op_helper.c        |  12 +-
 target/mips/translate.c        | 374 ++++++++++++++++++++++++++++++++++-------
 13 files changed, 526 insertions(+), 150 deletions(-)

-- 
2.7.4




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