[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v10 43/65] target/mips: Add definition of nanoMIPS I
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v10 43/65] target/mips: Add definition of nanoMIPS I7200 CPU |
Date: |
Fri, 17 Aug 2018 16:03:31 +0200 |
From: Stefan Markovic <address@hidden>
Add definition of the first nanoMIPS processor in QEMU.
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
---
target/mips/translate_init.inc.c | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.inc.c
index c7ba6ee..b3320b9 100644
--- a/target/mips/translate_init.inc.c
+++ b/target/mips/translate_init.inc.c
@@ -449,6 +449,45 @@ const mips_def_t mips_defs[] =
.insn_flags = CPU_MIPS32R6 | ASE_MICROMIPS,
.mmu_type = MMU_TYPE_R4000,
},
+ {
+ .name = "I7200",
+ .CP0_PRid = 0x00010000,
+ .CP0_Config0 = MIPS_CONFIG0 | (1 << CP0C0_MM) | (0x2 << CP0C0_AR) |
+ (MMU_TYPE_R4000 << CP0C0_MT),
+ .CP0_Config1 = (1U << CP0C1_M) | (15 << CP0C1_MMU) | (2 << CP0C1_IS) |
+ (4 << CP0C1_IL) | (3 << CP0C1_IA) | (2 << CP0C1_DS) |
+ (4 << CP0C1_DL) | (3 << CP0C1_DA) | (1 << CP0C1_PC) |
+ (1 << CP0C1_EP),
+ .CP0_Config2 = MIPS_CONFIG2,
+ .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_CMGCR) |
+ (1 << CP0C3_BI) | (1 << CP0C3_SC) | (3 << CP0C3_MMAR) |
+ (1 << CP0C3_ISA_ON_EXC) | (1 << CP0C3_ISA) |
+ (1 << CP0C3_ULRI) | (1 << CP0C3_RXI) |
+ (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |
+ (1 << CP0C3_CTXTC) | (1 << CP0C3_VInt) |
+ (1 << CP0C3_CDMM) | (1 << CP0C3_MT) | (1 << CP0C3_TL),
+ .CP0_Config4 = MIPS_CONFIG4 | (0xfc << CP0C4_KScrExist) |
+ (2 << CP0C4_IE) | (1U << CP0C4_M),
+ .CP0_Config5 = MIPS_CONFIG5 | (1 << CP0C5_MVH) | (1 << CP0C5_LLB),
+ .CP0_Config5_rw_bitmask = (1 << CP0C5_SBRI) | (1 << CP0C5_FRE) |
+ (1 << CP0C5_UFE),
+ .CP0_LLAddr_rw_bitmask = 0,
+ .CP0_LLAddr_shift = 0,
+ .SYNCI_Step = 32,
+ .CCRes = 2,
+ .CP0_Status_rw_bitmask = 0x3158FF1F,
+ .CP0_PageGrain = (1 << CP0PG_IEC) | (1 << CP0PG_XIE) |
+ (1U << CP0PG_RIE),
+ .CP0_PageGrain_rw_bitmask = 0,
+ .CP1_fcr0 = (1 << FCR0_FREP) | (1 << FCR0_HAS2008) | (1 << FCR0_F64) |
+ (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
+ (1 << FCR0_S) | (0x02 << FCR0_PRID) | (0x0 << FCR0_REV),
+ .CP1_fcr31 = (1 << FCR31_ABS2008) | (1 << FCR31_NAN2008),
+ .SEGBITS = 32,
+ .PABITS = 32,
+ .insn_flags = CPU_NANOMIPS32 | ASE_DSP | ASE_DSPR2 | ASE_MT,
+ .mmu_type = MMU_TYPE_R4000,
+ },
#if defined(TARGET_MIPS64)
{
.name = "R4000",
--
2.7.4
- [Qemu-devel] [PATCH v10 35/65] target/mips: Fix ERET/ERETNC behavior related to ADEL exception, (continued)
- [Qemu-devel] [PATCH v10 35/65] target/mips: Fix ERET/ERETNC behavior related to ADEL exception, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 63/65] gdbstub: Disable handling of nanoMIPS ISA bit in the MIPS gdbstub, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 30/65] target/mips: Add emulation of DSP ASE for nanoMIPS - part 4, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 20/65] target/mips: Implement emulation of nanoMIPS ROTX instruction, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 21/65] target/mips: Implement emulation of nanoMIPS EXTW instruction, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 25/65] target/mips: Fix pre-nanoMIPS MT ASE instructions availability control, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 55/65] linux-user: Add signal.c for nanoMIPS, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 56/65] linux-user: Add support for nanoMIPS signal trampoline, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 51/65] linux-user: Add target_syscall.h header for nanoMIPS, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 58/65] linux-user: Amend support for sigaction() syscall for nanoMIPS, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 43/65] target/mips: Add definition of nanoMIPS I7200 CPU,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v10 62/65] linux-user: Add nanoMIPS support in scripts/qemu-binfmt-conf.sh, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 23/65] target/mips: Implement emulation of nanoMIPS LLWP/SCWP pair, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 24/65] target/mips: Add emulation of nanoMIPS 32-bit branch instructions, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 60/65] linux-user: Add support for nanoMIPS core files, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 22/65] target/mips: Add emulation of nanoMIPS 32-bit load and store instructions, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 32/65] target/mips: Add emulation of DSP ASE for nanoMIPS - part 6, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 61/65] linux-user: Add nanoMIPS linux user mode configuration support, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 41/65] mips_malta: Add setting up GT64120 BARs to the nanoMIPS bootloader, Aleksandar Markovic, 2018/08/17
- [Qemu-devel] [PATCH v10 47/65] linux-user: Add termbits.h header for nanoMIPS, Aleksandar Markovic, 2018/08/17