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Re: [Qemu-devel] virtio ignores pci_address_space_*()?
From: |
Mark Cave-Ayland |
Subject: |
Re: [Qemu-devel] virtio ignores pci_address_space_*()? |
Date: |
Sun, 19 Aug 2018 07:49:09 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 18/08/18 21:21, Mark Cave-Ayland wrote:
> Hi all,
>
> As part of testing my OpenBIOS virtio-blk implementation, I've been
> trying to use it under the 40p machine and have some questions related
> to how address spaces are interpreted.
>
> The 40p PCI address space is aliased onto the CPU physical address space
> with an offset of 0x80000000 i.e.
>
> PCI address space 0x80001234 -> CPU address space 0x1234
>
> For the LSI SCSI controller this just works: when configuring the DMA
> descriptors I write the destination address to the LSI registers in PCI
> address space i.e. 0x80001234. Internally this calls pci_dma_read() and
> pci_dma_write() and the data gets transferred correctly to physical
> address 0x1234.
>
> When trying to configure a virtio device I'm not seeing the same
> behaviour: firstly it seems that I need to write the CPU address 0x1234
> to VIRTIO_PCI_QUEUE_PFN rather than the PCI address 0x80001234 as I
> would expect.
>
> Following this I've tried to configure the address in the virtio
> descriptors with both the CPU address and PCI address and neither seems
> to work in my tests here.
>
> Looking through the virtio code I can't see any references to
> pci_dma_read()/pci_dma_write() so I was wondering if someone can confirm
> whether I should be using CPU or PCI addresses when programming virtio
> registers and descriptors for machines such as 40p, and where I can find
> the address space being used for virtio device reads/writes?
So after quite a lot more searching I think I've finally found the answer:
- Enable VIRTIO_F_IOMMU_PLATFORM feature bit via iommu_platform property
to enable use of iovas in the descriptor rings
- Write the physical address to VIRTIO_PCI_QUEUE_PFN
Does this sound right?
ATB,
Mark.