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[Qemu-devel] [PULL v5 00/46] MIPS queue August 2018 v5
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v5 00/46] MIPS queue August 2018 v5 |
Date: |
Thu, 23 Aug 2018 16:18:15 +0200 |
From: Aleksandar Markovic <address@hidden>
The following changes since commit 3392fbee4e435658733bbe9aab23392660558b59:
Merge remote-tracking branch
'remotes/vivier2/tags/linux-user-for-3.1-pull-request' into staging (2018-08-23
12:28:17 +0100)
are available in the git repository at:
https://github.com/AMarkovic/qemu tags/mips-queue-aug-2018
for you to fetch changes up to e7133037c63d9d806f1a1f6c5a1906e658496cfa:
target/mips: Add definition of nanoMIPS I7200 CPU (2018-08-23 16:11:35 +0200)
----------------------------------------------------------------
MIPS queue August 2018 v5
The patches in this queue add support for core functionality and
system mode for nanoMIPS platform.
v5: Corrected repository
v4: Fixed clang build errors for user mode configurationos.
v3: Fixed initial ('since') commit.
v2: Added missing 'Reviewed-by' lines
----------------------------------------------------------------
Aleksandar Markovic (5):
target/mips: Add preprocessor constants for nanoMIPS
target/mips: Add placeholder and invocation of decode_nanomips_opc()
target/mips: Add nanoMIPS decoding and extraction utilities
elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too
elf: Don't check FCR31_NAN2008 bit for nanoMIPS
Aleksandar Rikalo (4):
target/mips: Implement emulation of nanoMIPS LLWP/SCWP pair
target/mips: Fix pre-nanoMIPS MT ASE instructions availability control
elf: Add EM_NANOMIPS value as a valid one for e_machine field
elf: On elf loading, treat both EM_MIPS and EM_NANOMIPS as legal for
MIPS
Dimitrije Nikolic (2):
target/mips: Add CP0 Config3 and Config5 fields to DisasContext
structure
target/mips: Add availability control via bit NMS
James Hogan (1):
target/mips: Implement emulation of nanoMIPS EXTW instruction
Matthew Fortune (3):
target/mips: Implement emulation of nanoMIPS ROTX instruction
disas: Add support for nanoMIPS platform
mips_malta: Add basic nanoMIPS boot code for Malta board
Paul Burton (1):
mips_malta: Add setting up GT64120 BARs to the nanoMIPS bootloader
Stefan Markovic (15):
target/mips: Add nanoMIPS DSP ASE opcodes
target/mips: Prevent switching mode related to Config3 ISA bit for
nanoMIPS
target/mips: Add emulation of nanoMIPS 16-bit branch instructions
target/mips: Add emulation of nanoMIPS 16-bit save and restore
instructions
target/mips: Add emulation of nanoMIPS 32-bit branch instructions
target/mips: Implement MT ASE support for nanoMIPS
target/mips: Add emulation of DSP ASE for nanoMIPS - part 1
target/mips: Add emulation of DSP ASE for nanoMIPS - part 2
target/mips: Add emulation of DSP ASE for nanoMIPS - part 3
target/mips: Add emulation of DSP ASE for nanoMIPS - part 4
target/mips: Add emulation of DSP ASE for nanoMIPS - part 5
target/mips: Add emulation of DSP ASE for nanoMIPS - part 6
target/mips: Add updating BadInstr and BadInstrX for nanoMIPS
mips_malta: Fix semihosting argument passing for nanoMIPS bare metal
target/mips: Add definition of nanoMIPS I7200 CPU
Yongbok Kim (15):
target/mips: Add nanoMIPS base instruction set opcodes
target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions
target/mips: Add emulation of nanoMIPS 16-bit shift instructions
target/mips: Add emulation of nanoMIPS 16-bit misc instructions
target/mips: Add emulation of nanoMIPS 16-bit load and store
instructions
target/mips: Add emulation of nanoMIPS 16-bit logic instructions
target/mips: Add emulation of some common nanoMIPS 32-bit instructions
target/mips: Add emulation of nanoMIPS instructions MOVE.P and
MOVE.PREV
target/mips: Add emulation of nanoMIPS 48-bit instructions
target/mips: Add emulation of nanoMIPS FP instructions
target/mips: Add emulation of misc nanoMIPS instructions (pool32a0)
target/mips: Add emulation of misc nanoMIPS instructions (pool32axf)
target/mips: Add emulation of misc nanoMIPS instructions (p_lsx)
target/mips: Add emulation of nanoMIPS 32-bit load and store
instructions
target/mips: Fix ERET/ERETNC behavior related to ADEL exception
MAINTAINERS | 2 +
disas/Makefile.objs | 1 +
disas/mips.c | 90 +-
disas/nanomips.cpp | 15812 +++++++++++++++++++++++++++++++++++++
disas/nanomips.h | 1100 +++
hw/mips/mips_malta.c | 212 +-
include/disas/bfd.h | 1 +
include/elf.h | 2 +
include/hw/elf_ops.h | 8 +
linux-user/elfload.c | 2 +
linux-user/mips/cpu_loop.c | 28 +-
target/mips/cpu.c | 11 +-
target/mips/cpu.h | 2 +
target/mips/helper.c | 16 +
target/mips/helper.h | 2 +
target/mips/mips-defs.h | 4 +
target/mips/op_helper.c | 98 +-
target/mips/translate.c | 4981 +++++++++++-
target/mips/translate_init.inc.c | 39 +
19 files changed, 22330 insertions(+), 81 deletions(-)
create mode 100644 disas/nanomips.cpp
create mode 100644 disas/nanomips.h
--
2.7.4
- [Qemu-devel] [PULL v5 00/46] MIPS queue August 2018 v5,
Aleksandar Markovic <=
- [Qemu-devel] [PULL v5 04/46] target/mips: Prevent switching mode related to Config3 ISA bit for nanoMIPS, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 01/46] target/mips: Add preprocessor constants for nanoMIPS, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 13/46] target/mips: Add emulation of nanoMIPS 16-bit save and restore instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 03/46] target/mips: Add nanoMIPS DSP ASE opcodes, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 06/46] target/mips: Add nanoMIPS decoding and extraction utilities, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 08/46] target/mips: Add emulation of nanoMIPS 16-bit branch instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 12/46] target/mips: Add emulation of nanoMIPS 16-bit logic instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 11/46] target/mips: Add emulation of nanoMIPS 16-bit load and store instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 22/46] target/mips: Implement emulation of nanoMIPS EXTW instruction, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 35/46] target/mips: Add availability control via bit NMS, Aleksandar Markovic, 2018/08/23