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Re: [Qemu-devel] [PATCH V4 4/4] target-i386: add i440fx 0xcf8 port as co
From: |
Liran Alon |
Subject: |
Re: [Qemu-devel] [PATCH V4 4/4] target-i386: add i440fx 0xcf8 port as coalesced_pio |
Date: |
Sun, 26 Aug 2018 02:29:35 +0300 |
> On 25 Aug 2018, at 15:19, Peng Hao <address@hidden> wrote:
>
> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> index 0e60834..da73743 100644
> --- a/hw/pci-host/piix.c
> +++ b/hw/pci-host/piix.c
> @@ -327,6 +327,10 @@ static void i440fx_pcihost_realize(DeviceState *dev,
> Error **errp)
>
> sysbus_add_io(sbd, 0xcfc, &s->data_mem);
> sysbus_init_ioports(sbd, 0xcfc, 4);
> +
> + /* register i440fx 0xcf8 port as coalesced pio */
> + memory_region_set_flush_coalesced(&s->data_mem);
> + memory_region_add_coalescing(&s->conf_mem, 0, 4);
> }
>
Is there a reason to not register this port as coalesced PIO also for Q35?
In q35_host_realize()?
If not, I would do that as an extra patch as part of this series.
-Liran
- [Qemu-devel] [PATCH V4 0/4] introduce coalesced pio support, Peng Hao, 2018/08/25
- [Qemu-devel] [PATCH V4 1/4] target-i386: introduce coalesced_pio kvm header update, Peng Hao, 2018/08/25
- [Qemu-devel] [PATCH V4 2/4] target-i386:add coalesced_pio API, Peng Hao, 2018/08/25
- [Qemu-devel] [PATCH V4 3/4] target-i386: add rtc 0x70 port as coalesced_pio, Peng Hao, 2018/08/25
- [Qemu-devel] [PATCH V4 4/4] target-i386: add i440fx 0xcf8 port as coalesced_pio, Peng Hao, 2018/08/25
- Re: [Qemu-devel] [PATCH V4 4/4] target-i386: add i440fx 0xcf8 port as coalesced_pio,
Liran Alon <=
- Re: [Qemu-devel] [PATCH V4 0/4] introduce coalesced pio support, Eduardo Habkost, 2018/08/28