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[Qemu-devel] [PATCH 12/13] target/arm: Derive id_aa64pfr0 from features
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 12/13] target/arm: Derive id_aa64pfr0 from features |
Date: |
Sat, 15 Sep 2018 09:17:37 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/cpu.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index a9724f3bb1..2ec71104c9 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1080,6 +1080,31 @@ static uint64_t resolve_id_aa64isar1(CPUARMState *env)
return ret;
}
+static uint64_t resolve_id_aa64pfr0(CPUARMState *env)
+{
+ uint64_t ret = 0;
+
+ ret = deposit64(ret, 0, 4, 2); /* EL0 */
+ ret = deposit64(ret, 4, 4, 2); /* EL1 */
+ if (arm_feature(env, ARM_FEATURE_EL2)) {
+ ret = deposit64(ret, 8, 4, 2); /* EL2 */
+ }
+ if (arm_feature(env, ARM_FEATURE_EL3)) {
+ ret = deposit64(ret, 12, 4, 2); /* EL3 */
+ }
+ if (arm_feature(env, ARM_FEATURE_V8_FP16)) {
+ ret = deposit64(ret, 16, 4, 1); /* FP */
+ ret = deposit64(ret, 20, 4, 1); /* AdvSIMD */
+ }
+ /* GIC -- info not available yet; filled in by id_aa64pfr0_read */
+ /* RAS -- not implemented yet */
+ if (arm_feature(env, ARM_FEATURE_SVE)) {
+ ret = deposit64(ret, 32, 4, 1); /* SVE */
+ }
+
+ return ret;
+}
+
static void resolve_id_regs(ARMCPU *cpu)
{
CPUARMState *env = &cpu->env;
@@ -1122,6 +1147,10 @@ static void resolve_id_regs(ARMCPU *cpu)
g_assert_cmphex(cpu->id_aa64isar0, ==, orig);
cpu->id_aa64isar1 = resolve_id_aa64isar1(env);
+
+ orig = cpu->id_aa64pfr0;
+ cpu->id_aa64pfr0 = resolve_id_aa64pfr0(env);
+ g_assert_cmphex(cpu->id_aa64pfr0, ==, orig);
}
static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
--
2.17.1
- [Qemu-devel] [PATCH 03/13] target/arm: Derive id_isar1 from features, (continued)
- [Qemu-devel] [PATCH 03/13] target/arm: Derive id_isar1 from features, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 05/13] target/arm: Derive id_isar3 from features, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 06/13] target/arm: Derive id_isar4 from features, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 04/13] target/arm: Derive id_isar2 from features, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 08/13] target/arm: Derive id_pfr0 from features, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 07/13] target/arm: Derive id_isar5 and id_isar6 from features, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 09/13] target/arm: Derive id_pfr1 from features, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 10/13] target/arm: Derive id_aa64isar0 from features, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 11/13] target/arm: Derive id_aa64isar1 from features, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 13/13] target/arm: Remove assertions from resolve_id_regs, Richard Henderson, 2018/09/15
- [Qemu-devel] [PATCH 12/13] target/arm: Derive id_aa64pfr0 from features,
Richard Henderson <=
- Re: [Qemu-devel] [RFC PATCH 00/13] target/arm: Derive cpu id regs from features, Alex Bennée, 2018/09/19