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[Qemu-devel] [PATCH v2 2/4] target/mips: Remove definitions that are onl
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-devel] [PATCH v2 2/4] target/mips: Remove definitions that are only used once |
Date: |
Sun, 30 Sep 2018 21:56:53 +0200 |
There is no gain in adding cpu definition which is used only once.
Use the chip specific flags directly in place.
This also clears the 'MIPS CPU defines' namespace.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
target/mips/mips-defs.h | 5 -----
target/mips/translate_init.inc.c | 8 ++++----
2 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index 76550de2da..84607d8933 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -63,11 +63,6 @@
#define CPU_MIPS2 (CPU_MIPS1 | ISA_MIPS2)
#define CPU_MIPS3 (CPU_MIPS2 | ISA_MIPS3)
#define CPU_MIPS4 (CPU_MIPS3 | ISA_MIPS4)
-#define CPU_VR54XX (CPU_MIPS4 | INSN_VR54XX)
-#define CPU_R5900 (CPU_MIPS3 | INSN_R5900)
-#define CPU_LOONGSON2E (CPU_MIPS3 | INSN_LOONGSON2E)
-#define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F)
-
#define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
/* MIPS Technologies "Release 1" */
diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.inc.c
index b5dacf4ffe..bf697b64cc 100644
--- a/target/mips/translate_init.inc.c
+++ b/target/mips/translate_init.inc.c
@@ -466,7 +466,7 @@ const mips_def_t mips_defs[] =
#endif /* !CONFIG_USER_ONLY */
.SEGBITS = 32,
.PABITS = 32,
- .insn_flags = CPU_R5900,
+ .insn_flags = CPU_MIPS3 | INSN_R5900,
.mmu_type = MMU_TYPE_R4000,
},
{
@@ -586,7 +586,7 @@ const mips_def_t mips_defs[] =
.CP1_fcr31_rw_bitmask = 0xFF83FFFF,
.SEGBITS = 40,
.PABITS = 32,
- .insn_flags = CPU_VR54XX,
+ .insn_flags = CPU_MIPS4 | INSN_VR54XX,
.mmu_type = MMU_TYPE_R4000,
},
{
@@ -796,7 +796,7 @@ const mips_def_t mips_defs[] =
.CP1_fcr31_rw_bitmask = 0xFF83FFFF,
.SEGBITS = 40,
.PABITS = 40,
- .insn_flags = CPU_LOONGSON2E,
+ .insn_flags = CPU_MIPS3 | INSN_LOONGSON2E,
.mmu_type = MMU_TYPE_R4000,
},
{
@@ -816,7 +816,7 @@ const mips_def_t mips_defs[] =
.CP1_fcr31_rw_bitmask = 0xFF83FFFF,
.SEGBITS = 40,
.PABITS = 40,
- .insn_flags = CPU_LOONGSON2F,
+ .insn_flags = CPU_MIPS3 | INSN_LOONGSON2F,
.mmu_type = MMU_TYPE_R4000,
},
{
--
2.19.0