[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 11/20] target/arm: Use gvec for NEON_3R_VMUL
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 11/20] target/arm: Use gvec for NEON_3R_VMUL |
Date: |
Thu, 11 Oct 2018 13:51:57 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 31 +++++++++++++++----------------
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index fae132791a..e195efcc55 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5959,6 +5959,19 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
vec_size, vec_size);
}
return 0;
+
+ case NEON_3R_VMUL: /* VMUL */
+ if (u) {
+ /* Polynomial case allows only P8 and is handled below. */
+ if (size != 0) {
+ return 1;
+ }
+ } else {
+ tcg_gen_gvec_mul(size, rd_ofs, rn_ofs, rm_ofs,
+ vec_size, vec_size);
+ return 0;
+ }
+ break;
}
if (size == 3) {
/* 64-bit element instructions. */
@@ -6065,12 +6078,6 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
return 1;
}
break;
- case NEON_3R_VMUL:
- if (u && (size != 0)) {
- /* UNDEF on invalid size for polynomial subcase */
- return 1;
- }
- break;
case NEON_3R_VFM_VQRDMLSH:
if (!arm_dc_feature(s, ARM_FEATURE_VFP4)) {
return 1;
@@ -6183,16 +6190,8 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
}
break;
case NEON_3R_VMUL:
- if (u) { /* polynomial */
- gen_helper_neon_mul_p8(tmp, tmp, tmp2);
- } else { /* Integer */
- switch (size) {
- case 0: gen_helper_neon_mul_u8(tmp, tmp, tmp2); break;
- case 1: gen_helper_neon_mul_u16(tmp, tmp, tmp2); break;
- case 2: tcg_gen_mul_i32(tmp, tmp, tmp2); break;
- default: abort();
- }
- }
+ /* VMUL.P8; other cases already eliminated. */
+ gen_helper_neon_mul_p8(tmp, tmp, tmp2);
break;
case NEON_3R_VPMAX:
GEN_NEON_INTEGER_OP(pmax);
--
2.17.1
- [Qemu-devel] [PATCH 00/20] target/arm: Convert some neon insns to gvec, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 01/20] target/arm: Hoist address increment for vector memory ops, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 02/20] target/arm: Don't call tcg_clear_temp_count, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 09/20] target/arm: Use gvec for NEON_3R_VADD_VSUB insns, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 17/20] target/arm: Use gvec for NEON VLD all lanes, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 11/20] target/arm: Use gvec for NEON_3R_VMUL,
Richard Henderson <=
- [Qemu-devel] [PATCH 18/20] target/arm: Reorg NEON VLD/VST all elements, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 05/20] target/arm: Mark some arrays const, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 03/20] target/arm: Use tcg_gen_gvec_dup_i64 for LD[1-4]R, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 13/20] target/arm: Use gvec for VSRA, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 06/20] target/arm: Use gvec for NEON VDUP, Richard Henderson, 2018/10/11
- [Qemu-devel] [PATCH 19/20] target/arm: Promote consecutive memory ops for aa32, Richard Henderson, 2018/10/11