Re: [Qemu-devel] [PATCH v3 4/4] cputlb: read CPUTLBEntry.addr_write atomically

[Emilio G. Cota]

On Tue, Oct 16, 2018 at 08:03:03 +0200, Paolo Bonzini wrote:
> On 16/10/2018 04:52, Richard Henderson wrote:
> > On 10/5/18 2:14 PM, Emilio G. Cota wrote:
> >> -    target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
> >> +    target_ulong tlb_addr =
> >> +        atomic_read(&env->tlb_table[mmu_idx][index].addr_write);
> > 
> > This fails for 32-bit hosts emulating 64-bit hosts.
> > I think you need a separate helper function.  Perhaps
> > 
> > static inline target_ulong tlb_addr_write(CPUTLBEntry *ent)
> > {
> > #if TCG_OVERSIZED_GUEST
> >     return ent->addr_write;
> > #else
> >     return atomic_read(&ent->addr_write);
> > #endif
> > }

Ouch, yes.

> Or just atomic_read__nocheck.

I prefer special-casing oversized guests, otherwise we risk having
compile-time errors -- like the ones we got on mingw 32-bit when
not checking for CONFIG_ATOMIC64.

> > I'm going to drop this patch from my queue for now.
> > We can fix it up this week some time.

Sounds good. I'll send a patch on top of your current tcg-next
to avoid conflicts.

Thanks,

                Emilio