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[Qemu-devel] [PULL 4/5] RISC-V: Add missing free for plic_hart_config
From: |
Palmer Dabbelt |
Subject: |
[Qemu-devel] [PULL 4/5] RISC-V: Add missing free for plic_hart_config |
Date: |
Wed, 17 Oct 2018 14:54:21 -0700 |
From: Michael Clark <address@hidden>
Signed-off-by: Michael Clark <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Palmer Dabbelt <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>
---
hw/riscv/virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 005169eabcb4..6bd723dc3ad9 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -385,6 +385,8 @@ static void riscv_virt_board_init(MachineState *machine)
serial_mm_init(system_memory, memmap[VIRT_UART0].base,
0, qdev_get_gpio_in(DEVICE(s->plic), UART0_IRQ), 399193,
serial_hd(0), DEVICE_LITTLE_ENDIAN);
+
+ g_free(plic_hart_config);
}
static void riscv_virt_board_machine_init(MachineClass *mc)
--
2.18.1
- [Qemu-devel] [PULL] First RISC-V Patch Set for the 3.1 Soft Freeze, Palmer Dabbelt, 2018/10/17
- [Qemu-devel] [PULL 2/5] RISC-V: Move non-ops from op_helper to cpu_helper, Palmer Dabbelt, 2018/10/17
- [Qemu-devel] [PULL 1/5] RISC-V: Allow setting and clearing multiple irqs, Palmer Dabbelt, 2018/10/17
- [Qemu-devel] [PULL 5/5] RISC-V: Don't add NULL bootargs to device-tree, Palmer Dabbelt, 2018/10/17
- [Qemu-devel] [PULL 4/5] RISC-V: Add missing free for plic_hart_config,
Palmer Dabbelt <=
- [Qemu-devel] [PULL 3/5] RISC-V: Update CSR and interrupt definitions, Palmer Dabbelt, 2018/10/17
- Re: [Qemu-devel] [PULL] First RISC-V Patch Set for the 3.1 Soft Freeze, Eric Blake, 2018/10/17
- Re: [Qemu-devel] [PULL] First RISC-V Patch Set for the 3.1 Soft Freeze, Peter Maydell, 2018/10/25