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Re: [Qemu-devel] [PATCH v5 2/3] x86: Data structure changes to support M
From: |
Robert Hoo |
Subject: |
Re: [Qemu-devel] [PATCH v5 2/3] x86: Data structure changes to support MSR based features |
Date: |
Thu, 25 Oct 2018 11:06:59 +0800 |
On Wed, 2018-10-24 at 07:16 -0300, Eduardo Habkost wrote:
> On Mon, Oct 15, 2018 at 12:47:24PM +0800, Robert Hoo wrote:
> > Add FeatureWordType indicator in struct FeatureWordInfo.
> > Change feature_word_info[] accordingly.
> > Change existing functions that refer to feature_word_info[]
> > accordingly.
> >
> > Signed-off-by: Robert Hoo <address@hidden>
> > ---
> > target/i386/cpu.c | 188 +++++++++++++++++++++++++++++++++++++++---
> > ------------
> > 1 file changed, 136 insertions(+), 52 deletions(-)
> >
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index c88876d..d191b9c 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -770,17 +770,36 @@ static void x86_cpu_vendor_words2str(char
> > *dst, uint32_t vendor1,
> > /* missing:
> > CPUID_XSAVE_XSAVEC, CPUID_XSAVE_XSAVES */
> >
> > +typedef enum FeatureWordType {
> > + CPUID_FEATURE_WORD,
> > + MSR_FEATURE_WORD,
> > +} FeatureWordType;
> > +
> > typedef struct FeatureWordInfo {
> > + FeatureWordType type;
> > /* feature flags names are taken from "Intel Processor
> > Identification and
> > * the CPUID Instruction" and AMD's "CPUID Specification".
> > * In cases of disagreement between feature naming
> > conventions,
> > * aliases may be added.
> > */
> > const char *feat_names[32];
> > - uint32_t cpuid_eax; /* Input EAX for CPUID */
> > - bool cpuid_needs_ecx; /* CPUID instruction uses ECX as input
> > */
> > - uint32_t cpuid_ecx; /* Input ECX value for CPUID */
> > - int cpuid_reg; /* output register (R_* constant) */
> > + union {
> > + /* If type==CPUID_FEATURE_WORD */
> > + struct {
> > + uint32_t eax; /* Input EAX for CPUID */
> > + bool needs_ecx; /* CPUID instruction uses ECX as input
> > */
> > + uint32_t ecx; /* Input ECX value for CPUID */
> > + int reg; /* output register (R_* constant) */
> > + } cpuid;
> > + /* If type==MSR_FEATURE_WORD */
> > + struct {
> > + uint32_t index;
> > + struct { /*CPUID that enumerate this MSR*/
> > + FeatureWord cpuid_class;
> > + uint32_t cpuid_flag;
> > + } cpuid_dep;
>
> Aren't you going to use this field anywhere? Probably we want to
> prevent the VM from starting if a bit is set in the feature world
> but the cpuid_dep bit is not set.
>
> e.g.:
> qemu-system-x86_64 -cpu Skylake-Client,-arch-capabilities,+rsba
> probably should fail to start.
How about in x86_cpu_filter_features() filters the MSR feature word, if
its dependent CPUID feature bit is not set?
The filter results will be record in cpu->filtered_features, and print
out, like other filtered features.
>
> > + } msr;
> > + };
>
> [...]
>