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Re: [Qemu-devel] [PULL 00/47] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL 00/47] target-arm queue |
Date: |
Fri, 1 Feb 2019 17:56:46 +0000 |
On Fri, 1 Feb 2019 at 16:06, Peter Maydell <address@hidden> wrote:
>
> As promised, more Arm patches. The big thing in here is the
> MPS2-AN521 board model.
>
> thanks
> -- PMM
>
> The following changes since commit cfe6c547690b06fbce54a6d0f7b05dd7f18e36ea:
>
> Merge remote-tracking branch 'remotes/xanclic/tags/pull-block-2019-01-31'
> into staging (2019-01-31 19:26:09 +0000)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20190201
>
> for you to fetch changes up to 7743b70ffe7a8ce168adce2cf50ad156b1fefb8c:
>
> tests/microbit-test: Add tests for nRF51 NVMC (2019-02-01 15:32:17 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * New machine mps2-an521 -- this is a model of the AN521 FPGA image for the
> MPS2 devboard
> * Fix various places where we failed to UNDEF invalid A64 instructions
> * Don't UNDEF a valid FCMLA on 32-bit inputs
> * Fix some bugs in the newly-added PAuth implementation
> * microbit: Implement NVMC non-volatile memory controller
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0
for any user-visible changes.
-- PMM
- Re: [Qemu-devel] [PULL 43/47] target/arm: fix AArch64 virtual address space size, (continued)
- [Qemu-devel] [PULL 44/47] target/arm: fix decoding of B{, L}RA{A, B}, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 26/47] target/arm/translate-a64: Don't underdecode PRFM, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 11/47] hw/arm/armsse: Make SRAM bank size configurable, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 20/47] hw/misc/armsse-cpuid: Implement SSE-200 CPU_IDENTITY register block, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 47/47] tests/microbit-test: Add tests for nRF51 NVMC, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 36/47] target/arm: Add a timer to predict PMU counter overflow, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 12/47] hw/arm/armsse: Support dual-CPU configuration, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 38/47] arm: Clarify the logic of set_pc(), Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 45/47] hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories, Peter Maydell, 2019/02/01
- Re: [Qemu-devel] [PULL 00/47] target-arm queue,
Peter Maydell <=
- Re: [Qemu-devel] [PULL 00/47] target-arm queue, no-reply, 2019/02/03