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[Qemu-devel] [PATCH v6 0/4] target/mips: Optimize MSA interleave instruc
From: |
Mateja Marjanovic |
Subject: |
[Qemu-devel] [PATCH v6 0/4] target/mips: Optimize MSA interleave instructions |
Date: |
Thu, 4 Apr 2019 15:14:46 +0200 |
From: Mateja Marjanovic <address@hidden>
Optimize MSA instructions ILVEV.<B|H|W|D>, ILVOD.<B|H|W|D>,
ILVL.<B|H|W|D> and ILVR.<B|H|W|D> using the hybrid approach,
MSA helpers in some cases and directly tcg registers in other
cases, so the performance would be better.
v6:
- Add ILVL.<B|H|W|D> and ILVR.<B|H|W|D> MSA instructions
with mixed approaches (with helpers and with tcg
registers).
- Test the performance for ILVL.<B|H|W|D> and
ILVR.<B|H|W|D> MSA instructions, with helpers,
with tcg and with the mixed approach.
- Use a tcg register instead of an int variable for
storing a constant value of the mask (for logic
operations).
- Eliminate some unnecessary tcg_gen calls.
- Changes in commit messages and the cover letter.
v5:
- Use tcg_gen_deposit function.
- Added performance number for no-deposit and
with-deposit cases of ILVEV.W.
- Minor changes in commit messages and the cover letter.
v4:
- Clean up typing errors.
- Change the commit message and the cover letter.
- Fix bug for ILVEV.D, in case where the destination
and one of the sources are the same register.
v3:
- Reduce the number of logic operations to a
minimum.
- Add comments.
v2:
- Minor changes in commit messages and the cover letter.
Mateja Marjanovic (4):
target/mips: Optimize ILVOD.<B|H|W|D> MSA instructions
target/mips: Optimize ILVEV.<B|H|W|D> MSA instructions
target/mips: Optimize ILVL.<B|H|W|D> MSA instructions
target/mips: Optimize ILVR.<B|H|W|D> MSA instructions
target/mips/helper.h | 7 +-
target/mips/msa_helper.c | 82 +++++---
target/mips/translate.c | 498 ++++++++++++++++++++++++++++++++++++++++++++++-
3 files changed, 547 insertions(+), 40 deletions(-)
--
2.7.4