[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH for-4.0] target/i386: Generate #UD for LOCK on a
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH for-4.0] target/i386: Generate #UD for LOCK on a register increment |
Date: |
Tue, 9 Apr 2019 14:10:21 +0100 |
On Thu, 28 Mar 2019 at 11:14, Paolo Bonzini <address@hidden> wrote:
>
> On 28/03/19 11:47, Peter Maydell wrote:
> > Fix a TCG crash due to attempting an atomic increment
> > operation without having set up the address first.
> > This is a similar case to that dealt with in commit
> > e84fcd7f662a0d8198703, and we fix it in the same way.
> >
> > Fixes: https://bugs.launchpad.net/qemu/+bug/1807675
> > Signed-off-by: Peter Maydell <address@hidden>
> > ---
> > target/i386/translate.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/target/i386/translate.c b/target/i386/translate.c
> > index 49cd298374b..b725bec37cd 100644
> > --- a/target/i386/translate.c
> > +++ b/target/i386/translate.c
> > @@ -1398,6 +1398,11 @@ static void gen_op(DisasContext *s1, int op,
> > TCGMemOp ot, int d)
> > static void gen_inc(DisasContext *s1, TCGMemOp ot, int d, int c)
> > {
> > if (s1->prefix & PREFIX_LOCK) {
> > + if (d != OR_TMP0) {
> > + /* Lock prefix when destination is not memory */
> > + gen_illegal_opcode(s1);
> > + return;
> > + }
> > tcg_gen_movi_tl(s1->T0, c > 0 ? 1 : -1);
> > tcg_gen_atomic_add_fetch_tl(s1->T0, s1->A0, s1->T0,
> > s1->mem_index, ot | MO_LE);
> >
>
> Acked-by: Paolo Bonzini <address@hidden>
>
> Feel free to apply it yourself.
Applied to master, thanks.
-- PMM
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- Re: [Qemu-devel] [PATCH for-4.0] target/i386: Generate #UD for LOCK on a register increment,
Peter Maydell <=