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Re: [Qemu-devel] [PATCH v3] i386: Add new Hygon 'Dhyana' CPU model


From: Pavel Hrdina
Subject: Re: [Qemu-devel] [PATCH v3] i386: Add new Hygon 'Dhyana' CPU model
Date: Thu, 18 Apr 2019 11:59:35 +0200
User-agent: Mutt/1.11.3 (2019-02-01)

On Thu, Apr 18, 2019 at 09:48:25AM +0100, Daniel P. Berrangé wrote:
> On Wed, Apr 17, 2019 at 09:26:10PM +0200, Pavel Hrdina wrote:
> > On Wed, Apr 17, 2019 at 10:53:04PM +0800, Pu Wen wrote:
> > > On 2019/4/16 22:17, Pavel Hrdina wrote:
> > > > On Tue, Apr 16, 2019 at 08:06:13PM +0800, Pu Wen wrote:
> > > > > Add a new base CPU model called 'Dhyana' to model processors from 
> > > > > Hygon
> > > > > Dhyana(family 18h), which derived from AMD EPYC(family 17h).
> > > > > 
> > > > > The following features bits have been removed compare to AMD EPYC:
> > > > > aes, pclmulqdq, sha_ni
> > > > > 
> > > > > The Hygon Dhyana support to KVM in Linux is already accepted 
> > > > > upstream[1].
> > > > > So add Hygon Dhyana support to Qemu is necessary to create Hygon's own
> > > > > CPU model.
> > > > 
> > > > I have once question that we will have to solve for EPYC CPUs as well.
> > > > The name should not be based on the Product name or Model name as that
> > > > usually doesn't change with introduction of new microarchitecture.
> > > > 
> > > > With EPYC we made a mistake to name the CPU like that, luckily with
> > > > Intel we already use the microarchitecture name, so the EPYC CPU should
> > > > have been named ZEN-Server and for Ryzen CPUs there should be ZEN-Client
> > > > if there is any difference or otherwise we can simply use ZEN.
> > > > 
> > > > The issue here is what happens once the ZEN2 microarchitecture is out
> > > > wihch introduces new features and we will have to come up with a CPU
> > > > name.
> > > > 
> > > > Obviously we cannot change/remove the EPYC models so the question is
> > > > what is the difference between the AMD EPYC CPU and this new Dhyana CPU
> > > > if they are both based on the ZEN microarchitecture?
> > > 
> > > Right now there's no much difference between Dhyana and EPYC from the
> > > software's view. Dhyana removed the instructions aes, pclmulqdq, sha_ni
> > > compared to EPYC, but will have it's own implementation such as for aes in
> > > future CPU models. Hygon also will implement something different from AMD 
> > > in
> > > the future.
> > > 
> > > > In addition is there any way how we can introduce ZEN-Server &
> > > > ZEN-Client or simply ZEN, if there is no difference, as an alias or a
> > > > new model next to the EPYC?
> > > 
> > > Also as Eduardo mentioned that there's no CPU model alias or inheritance
> > > system in x86, so I think it's worthwhile to keep a separate CPU model for
> > > Hygon.
> > 
> > So what happens once Zen2 is out and there are new Dhyana CPUs based on
> > the Zen2 microarchitecture with some new features, what CPU models we
> > will introduce, EPYC-G2 and Dhyana-G2, but that will not correspond to
> > the CPU model anymore.
> > 
> > My idea was that we should probably introduce CPU model Zen-Server which
> > could cover both EPYC and Dhyana as they are both based on the Zen
> > microarchitecture.  The fact that Dhyana doesn't support all the
> > features is not an issue as QEMU will not use them if they are not
> > available on the host.
> 
> I don't think this is a good idea. AFAICT, Dhyana and EPYC should not be
> thought of as the same microarchitecture. Dhyana is a fork of the Zen
> microarchitecture as illustrated by the dropping of a number of CPU
> features. The Dhyana SEV patches show that it has had other significant
> changes, which are likely to require extra work in QEMU to support too.

Fair enough, still the point stands that we should use the name of the
microarchitecture.

Pavel

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