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[Qemu-devel] [PATCH v8 5/6] target/mips: Merge implementation of ILVEV.D
From: |
Mateja Marjanovic |
Subject: |
[Qemu-devel] [PATCH v8 5/6] target/mips: Merge implementation of ILVEV.D and ILVR.D |
Date: |
Thu, 18 Apr 2019 13:42:45 +0200 |
From: Mateja Marjanovic <address@hidden>
The implementation for ILVEV.D and ILVR.D instructions
is equivalent, so use a single handler for both of them.
Suggested-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Mateja Marjanovic <address@hidden>
---
target/mips/translate.c | 30 +++++++++++-------------------
1 file changed, 11 insertions(+), 19 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index d4bbfc3..c6aa995 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28078,20 +28078,6 @@ static inline void gen_ilvr_w(CPUMIPSState *env,
uint32_t wd,
}
/*
- * [MSA] ILVR.D wd, ws, wt
- *
- * Vector Interleave Right (doubleword data elements)
- *
- */
-static inline void gen_ilvr_d(CPUMIPSState *env, uint32_t wd,
- uint32_t ws, uint32_t wt)
-{
- tcg_gen_mov_i64(msa_wr_d[wd * 2 + 1], msa_wr_d[ws * 2]);
- tcg_gen_mov_i64(msa_wr_d[wd * 2], msa_wr_d[wt * 2]);
-}
-
-
-/*
* [MSA] ILVL.H wd, ws, wt
*
* Vector Interleave Left (halfword data elements)
@@ -28314,11 +28300,17 @@ static inline void gen_ilvev_w(CPUMIPSState *env,
uint32_t wd,
/*
* [MSA] ILVEV.D wd, ws, wt
*
- * Vector Interleave Even (Doubleword data elements)
+ * Vector Interleave Even (doubleword data elements)
+ *
+ * [MSA] ILVR.D wd, ws, wt
+ *
+ * Vector Interleave Right (doubleword data elements)
+ *
+ * These two instructions are functionally equivalent.
*
*/
-static inline void gen_ilvev_d(CPUMIPSState *env, uint32_t wd,
- uint32_t ws, uint32_t wt)
+static inline void gen_ilvev_ilvr_d(CPUMIPSState *env, uint32_t wd,
+ uint32_t ws, uint32_t wt)
{
tcg_gen_mov_i64(msa_wr_d[wd * 2 + 1], msa_wr_d[ws * 2]);
tcg_gen_mov_i64(msa_wr_d[wd * 2], msa_wr_d[wt * 2]);
@@ -28491,7 +28483,7 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext
*ctx)
gen_ilvr_w(env, wd, ws, wt);
break;
case DF_DOUBLE:
- gen_ilvr_d(env, wd, ws, wt);
+ gen_ilvev_ilvr_d(env, wd, ws, wt);
break;
default:
assert(0);
@@ -28521,7 +28513,7 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext
*ctx)
gen_ilvev_w(env, wd, ws, wt);
break;
case DF_DOUBLE:
- gen_ilvev_d(env, wd, ws, wt);
+ gen_ilvev_ilvr_d(env, wd, ws, wt);
break;
default:
assert(0);
--
2.7.4
- [Qemu-devel] [PATCH v8 0/6] target/mips: Optimize MSA interleave instructions, Mateja Marjanovic, 2019/04/18
- [Qemu-devel] [PATCH v8 1/6] target/mips: Optimize ILVOD.<B|H|W|D> MSA instructions, Mateja Marjanovic, 2019/04/18
- [Qemu-devel] [PATCH v8 2/6] target/mips: Optimize ILVEV.<B|H|W|D> MSA instructions, Mateja Marjanovic, 2019/04/18
- [Qemu-devel] [PATCH v8 3/6] target/mips: Optimize ILVL.<B|H|W|D> MSA instructions, Mateja Marjanovic, 2019/04/18
- [Qemu-devel] [PATCH v8 4/6] target/mips: Optimize ILVR.<B|H|W|D> MSA instructions, Mateja Marjanovic, 2019/04/18
- [Qemu-devel] [PATCH v8 6/6] target/mips: Merge implementation of ILVOD.D and ILVL.D, Mateja Marjanovic, 2019/04/18
- [Qemu-devel] [PATCH v8 5/6] target/mips: Merge implementation of ILVEV.D and ILVR.D,
Mateja Marjanovic <=