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[Qemu-devel] [PATCH v4 03/10] block/pflash_cfi02: Fix command address co
From: |
Stephen Checkoway |
Subject: |
[Qemu-devel] [PATCH v4 03/10] block/pflash_cfi02: Fix command address comparison |
Date: |
Fri, 26 Apr 2019 12:26:17 -0400 |
Most AMD commands only examine 11 bits of the address. This masks the
addresses used in the comparison to 11 bits. The exceptions are word or
sector addresses which use offset directly rather than the shifted
offset, boff.
Signed-off-by: Stephen Checkoway <address@hidden>
Acked-by: Thomas Huth <address@hidden>
---
hw/block/pflash_cfi02.c | 8 +++++++-
tests/pflash-cfi02-test.c | 12 ++++++++++--
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index 4b7af71806..e4bff0c8f8 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -296,11 +296,13 @@ static void pflash_write(void *opaque, hwaddr offset,
uint64_t value,
DPRINTF("%s: offset " TARGET_FMT_plx " %08" PRIx64 " %d\n", __func__,
offset, value, width);
- boff = offset & (pfl->sector_len - 1);
+ boff = offset;
if (pfl->width == 2)
boff = boff >> 1;
else if (pfl->width == 4)
boff = boff >> 2;
+ /* Only the least-significant 11 bits are used in most cases. */
+ boff &= 0x7FF;
switch (pfl->wcycle) {
case 0:
/* Set the device in I/O access mode if required */
@@ -519,6 +521,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Error
**errp)
return;
}
+ /* Only 11 bits are used in the comparison. */
+ pfl->unlock_addr0 &= 0x7FF;
+ pfl->unlock_addr1 &= 0x7FF;
+
chip_len = pfl->sector_len * pfl->nb_blocs;
memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl),
diff --git a/tests/pflash-cfi02-test.c b/tests/pflash-cfi02-test.c
index 40af1bb523..ea5f8b2648 100644
--- a/tests/pflash-cfi02-test.c
+++ b/tests/pflash-cfi02-test.c
@@ -21,8 +21,8 @@
#define FLASH_WIDTH 2
#define CFI_ADDR (FLASH_WIDTH * 0x55)
-#define UNLOCK0_ADDR (FLASH_WIDTH * 0x5555)
-#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AAA)
+#define UNLOCK0_ADDR (FLASH_WIDTH * 0x555)
+#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AA)
#define CFI_CMD 0x98
#define UNLOCK0_CMD 0xAA
@@ -190,6 +190,14 @@ static void test_flash(void)
g_assert_cmpint(flash_read(6), ==, 0xCDEF);
g_assert_cmpint(flash_read(8), ==, 0xFFFF);
+ /* Test ignored high order bits of address. */
+ flash_write(FLASH_WIDTH * 0x5555, UNLOCK0_CMD);
+ flash_write(FLASH_WIDTH * 0x2AAA, UNLOCK1_CMD);
+ flash_write(FLASH_WIDTH * 0x5555, AUTOSELECT_CMD);
+ g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0000), ==, 0x00BF);
+ g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0001), ==, 0x236D);
+ reset();
+
qtest_quit(global_qtest);
}
--
2.20.1 (Apple Git-117)
- [Qemu-devel] [PATCH v4 00/10] block/pflash_cfi02: Implement missing AMD pflash functionality, Stephen Checkoway, 2019/04/26
- [Qemu-devel] [PATCH v4 01/10] block/pflash_cfi02: Add test for supported commands, Stephen Checkoway, 2019/04/26
- [Qemu-devel] [PATCH v4 02/10] block/pflash_cfi02: Refactor, NFC intended, Stephen Checkoway, 2019/04/26
- [Qemu-devel] [PATCH v4 03/10] block/pflash_cfi02: Fix command address comparison,
Stephen Checkoway <=
- [Qemu-devel] [PATCH v4 06/10] block/pflash_cfi02: Fix CFI in autoselect mode, Stephen Checkoway, 2019/04/26
- [Qemu-devel] [PATCH v4 05/10] block/pflash_cfi02: Implement nonuniform sector sizes, Stephen Checkoway, 2019/04/26
- [Qemu-devel] [PATCH v4 07/10] block/pflash_cfi02: Fix reset command not ignored during erase, Stephen Checkoway, 2019/04/26
- [Qemu-devel] [PATCH v4 10/10] block/pflash_cfi02: Use the chip erase time specified in the CFI table, Stephen Checkoway, 2019/04/26
- [Qemu-devel] [PATCH v4 04/10] block/pflash_cfi02: Implement intereleaved flash devices, Stephen Checkoway, 2019/04/26
- [Qemu-devel] [PATCH v4 08/10] block/pflash_cfi02: Implement multi-sector erase, Stephen Checkoway, 2019/04/26
- [Qemu-devel] [PATCH v4 09/10] block/pflash_cfi02: Implement erase suspend/resume, Stephen Checkoway, 2019/04/26