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[PULL 14/37] hw/intc/arm_gicv3_kvm: Not set has-nmi=true for the KVM GIC
From: |
Peter Maydell |
Subject: |
[PULL 14/37] hw/intc/arm_gicv3_kvm: Not set has-nmi=true for the KVM GICv3 |
Date: |
Thu, 25 Apr 2024 11:39:35 +0100 |
From: Jinjie Ruan <ruanjinjie@huawei.com>
So far, there is no FEAT_GICv3_NMI support in the in-kernel GIC, so make it
an error to try to set has-nmi=true for the KVM GICv3.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Message-id: 20240407081733.3231820-15-ruanjinjie@huawei.com
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/intc/arm_gicv3_kvm.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c
index 77eb37e1317..00a383079b9 100644
--- a/hw/intc/arm_gicv3_kvm.c
+++ b/hw/intc/arm_gicv3_kvm.c
@@ -805,6 +805,11 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error
**errp)
return;
}
+ if (s->nmi_support) {
+ error_setg(errp, "NMI is not supported with the in-kernel GIC");
+ return;
+ }
+
gicv3_init_irqs_and_mmio(s, kvm_arm_gicv3_set_irq, NULL);
for (i = 0; i < s->num_cpu; i++) {
--
2.34.1
- [PULL 02/37] target/arm: Add PSTATE.ALLINT, (continued)
- [PULL 02/37] target/arm: Add PSTATE.ALLINT, Peter Maydell, 2024/04/25
- [PULL 03/37] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt, Peter Maydell, 2024/04/25
- [PULL 04/37] target/arm: Implement ALLINT MSR (immediate), Peter Maydell, 2024/04/25
- [PULL 01/37] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI, Peter Maydell, 2024/04/25
- [PULL 10/37] hw/intc/arm_gicv3: Add external IRQ lines for NMI, Peter Maydell, 2024/04/25
- [PULL 05/37] target/arm: Support MSR access to ALLINT, Peter Maydell, 2024/04/25
- [PULL 07/37] target/arm: Add support for NMI in arm_phys_excp_target_el(), Peter Maydell, 2024/04/25
- [PULL 06/37] target/arm: Add support for Non-maskable Interrupt, Peter Maydell, 2024/04/25
- [PULL 08/37] target/arm: Handle IS/FS in ISR_EL1 for NMI, VINMI and VFNMI, Peter Maydell, 2024/04/25
- [PULL 13/37] hw/intc/arm_gicv3: Add has-nmi property to GICv3 device, Peter Maydell, 2024/04/25
- [PULL 14/37] hw/intc/arm_gicv3_kvm: Not set has-nmi=true for the KVM GICv3,
Peter Maydell <=
- [PULL 15/37] hw/intc/arm_gicv3: Add irq non-maskable property, Peter Maydell, 2024/04/25
- [PULL 19/37] hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read(), Peter Maydell, 2024/04/25
- [PULL 21/37] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update(), Peter Maydell, 2024/04/25
- [PULL 26/37] linux-user/flatload.c: Remove unused bFLT shared-library and ZFLAT code, Peter Maydell, 2024/04/25
- [PULL 29/37] scripts/coccinelle: New script to add ResetType to hold and exit phases, Peter Maydell, 2024/04/25
- [PULL 18/37] hw/intc/arm_gicv3: Add NMI handling CPU interface registers, Peter Maydell, 2024/04/25
- [PULL 33/37] hw/char: Implement STM32L4x5 USART skeleton, Peter Maydell, 2024/04/25
- [PULL 12/37] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64(), Peter Maydell, 2024/04/25
- [PULL 09/37] target/arm: Handle PSTATE.ALLINT on taking an exception, Peter Maydell, 2024/04/25
- [PULL 11/37] hw/arm/virt: Wire NMI and VINMI irq lines from GIC to CPU, Peter Maydell, 2024/04/25